Adder-embedded dynamic preamplifier

A method for preamplification, said method comprising the steps of:

• precharging outputs OUTP and OUTN to voltage VDD in a first phase;
• evaluating said outputs depending on input values in a second phase, wherein discharging currents are decided by said input values proportionately;
• and
• amplifying discharging differences of said output OUTN and said output OUTP by latch, following degeneration.

A modulator comprising:

• an n-th level quantizer comprising:
• a plurality of adder-embedded dynamic preamplifier system;
• and a plurality of latches connected to said adder-embedded dynamic preamplifier system, which receives said at least two output signals (OUTP, OUTN), thereby providing an embedded adder quantizer;
• said adder-embedded dynamic preamplifier system comprising:
• at least a first precharge switch and a second precharge switch;
• at least a discharge switch;
• and
• a plurality of Gm sections, each comprising at least a differential pair of transistor and a pair of resistors, thereby providing a Gm cell;
• wherein one of said Gm sections receives reference signals, and another of said Gm section receives input signals,
• wherein said preamplifier system generates said two output signals (OUTP, OUTN);
• said output signals comprising summation of said output signals of said plurality of Gm sections;
• wherein said plurality of Gm sections are precharged by said at least a first precharge switch and a second precharge switch and said plurality of Gm sections are discharged by said at least a discharge switch;
• wherein each resistor of said pair of resistors determines gain of each of said Gm cells for each of said input signals for a function of subtraction;
• and
• wherein each ratio of each of said resistors decides each Gm ratio of each of said first input signals for a function of subtraction;
• wherein said at least a first precharge switch and a second precharge switch comprise precharged output nodes of said plurality of Gm sections for voltage VDD in a first phase;
• wherein said at least a discharge switch comprises discharged output nodes of said plurality of Gm sections through respective said resistors for ground in a second phase;
• wherein for each of said plurality of Gm sections, said differential pair of transistors is connected to said pair of resistors and said at least a first precharge switch and a second precharge switch, wherein said pair of resistors is connected to said at least a discharge switch, wherein said first and second input signals are applied to an input gate of said differential pair of transistors;
• wherein said adder-embedded dynamic preamplifier system adds output signals of integrators multiplied by predetermined gains, and outputs a quantized signal (V);
• wherein said output quantized signal (V) is fed back to an input signal (U).