Comparator circuit
AssigneeCrest Semiconductors, Inc.
InventorsRex K. Hales, Paul Talmage Watkins
Life of this patent
Estimating the term…
Abstract
An analog-to-digital converter includes a comparator configured to receive a first input signal and a second input signal, in which at least one of the input signals is received between two transistors, each of the transistors being in common-gate configuration. A method for comparing input signals performed by a comparator circuit includes: receiving a first input signal between a drain terminal of a first transistor of the comparator circuit and a source terminal of a second transistor of the comparator circuit; receiving a second input signal; and outputting a value based on a comparison of the first input signal and the second input signal.
Claims21
An analog-to-digital converter comprising:
- a comparator configured to receive a first input signal and a second input signal;
- in which at least one of said input signals is received between a drain terminal of a first transistor device and a source terminal of a second transistor device.
A method for comparing input signals performed by a comparator circuit, the method comprising:
- receiving a first input signal between a drain terminal of a first transistor of said comparator circuit and a source terminal of a second transistor of said comparator circuit;
- receiving a second input signal;
- and
- outputting a value based on a comparison of said first input signal and said second input signal.
An Analog-to-Digital Converter (ADC) comprising:
- a comparator configured to:
- receive a first input signal between a drain terminal of a first transistor of said comparator circuit and a source terminal of a second transistor of said comparator circuit;
- receive a second input signal;
- and
- output a value based on a comparison of said first input signal and said second input signal.
An analog-to-digital converter comprising:
- a comparator comprising a first transistor device and a second transistor device, wherein a drain terminal of said first transistor device is connected to a source terminal of said second transistor device;
- and
- two input terminals configured to receive, respectively, a first input signal and a second input signal;
- in which at least one of said input terminals is located on said connection between said drain terminal of said first transistor device and said source terminal of said second transistor device.
Dependencies are inferred from the claim text.