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US 8,410,813 B2Granted
Method and apparatus for a low power AC On-Die-Termination (ODT) circuit
AssigneeIntegrated Device Technology, Inc.
InventorsLiang Leon Zhang, Suresh Atluri, Yue Yu, Al Xuefeng Fang
Life of this patent
Estimating the term…
Abstract
A method and apparatus for A Low Power AC On-Die-Termination (ODT) Circuit using active components reduces receiver power consumption.
Claims16
A circuit on an integrated circuit comprising:
- a first resistor having an input and an output, said first resistor input coupled to receive an input;
- a first n-channel transistor having a drain, a gate, and a source, said first n-channel gate connected to said first resistor input, and said first n-channel drain connected to said first resistor output;
- a second resistor having an input and an output, said second resistor input connected to said first n-channel transistor source;
- a second n-channel transistor having a drain, a gate, and a source, said second n-channel transistor drain connected to said second resistor output;
- a first p-channel transistor having a source, a gate, and a drain, said first p-channel transistor gate connected to said first resistor input, and said first p-channel transistor drain connected to said first resistor output;
- a third resistor having an input and an output, said third resistor input connected to said first p-channel transistor source;
- and
- a second p-channel transistor having a source, a gate, and a drain, said second p-channel transistor drain connected to said third resistor output.
5 more elements
A method comprising using an alternating current (AC) on-die-termination (ODT) for a receive and using a degeneration circuit to reduce gm variation in one or more transistors.
An apparatus comprising:
- means for receiving a double data rate memory output at a receiver input on an integrated circuit;
- and
- means for alternating current electrically termination said receiver input to provide a substantially same impedance as a passive electrical termination;
- means for using a plurality of resistively connected n-channel transistors to calibrate a first n-channel transistor;
- and
- means for using a plurality of resistively connected p-channel transistors to calibrate a first p-channel transistor.
3 more elements
Dependencies are inferred from the claim text.