Anisotropic conductive connector, probe member and wafer inspection system
AssigneeJsr Corporation
InventorsMasaya Naoi, Hitoshi Fujiyama, Ichihiro Miura
Life of this patent
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AssigneeJsr Corporation
InventorsMasaya Naoi, Hitoshi Fujiyama, Ichihiro Miura
Estimating the term…
Provided is an anisotropic conductive connector and a prove member, each of which ensures that all of the conductive parts exhibit uniform conductivity when a pressing force is applied, even when the inspection target wafer has a large area and total number of inspection target electrodes of integrated circuits is 10,000 or more, and a wafer inspection system including the probe member. The anisotropic conductive connector includes a frame plate in which a plurality of anisotropic conductive film placement holes are formed, and elastic anisotropic conductive films respectively disposed in the anisotropic conductive film placement holes in the frame plate and supported by a peripheral part of the frame plate around the corresponding anisotropic conductive film placement hole, each of the elastic anisotropic conductive films includes a plurality of connection conductive parts each extending in a thicknesswise direction of the elastic anisotropic conductive film, being disposed corresponding to a connection target electrode, and comprising an elastic polymer substance and magnetic conductive particles densely contained in the elastic polymer substance; and an insulating part that insulates the connection conductive parts to one another, and the connection conductive parts of the elastic anisotropic conductive films disposed in a peripheral area of the frame plate having a thickness smaller than that of the connection conductive parts of the elastic anisotropic conductive films disposed in a center area of the frame plate.
An anisotropic conductive connector comprising:
An anisotropic conductive connector comprising:
An anisotropic conductive connector comprising:
An anisotropic conductive connector comprising:
An anisotropic conductive connector that is used to conduct an electrical inspection of each of a plurality of integrated circuits formed on a wafer in a state of the wafer, comprising:
Dependencies are inferred from the claim text.