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AssigneesRenesas Electronics Corporation, Kabushiki Kaisha Nihon Micronics
InventorsNobuhiro Sawa, Kouichi Minami, Masato Chiba
Estimating the term…
A test apparatus according to the present invention includes a probe card recognition unit that recognizes positions of at least two probe card marks formed to a probe card and assumes a probe card mark connection line connecting the positions of the probe card marks, a backing material recognition unit that recognizes positions of at least two backing material marks formed to a backing material where a semiconductor chip is fixed thereto and assumes a backing material mark connection line connecting the positions of the backing material mark, a positional relationship recognition unit that recognizes a positional relationship between the probe card and the backing material according to the probe card mark connection line and the backing material mark connection line, and a correction unit that corrects the position of at least one of the probe card and the backing material according to the positional relationship.
A test apparatus of a semiconductor device comprising:
A method of testing a semiconductor device comprising:
Dependencies are inferred from the claim text.