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US 8,410,586 B2Granted
Semiconductor package and method of assembling a semiconductor package
AssigneeInfineon Technologies AG
InventorsEdmund Riedl, Steffen Jordan, Christof Matthias Schilz, Fee Hoon Wong
Life of this patent
Estimating the term…
Abstract
A semiconductor package includes a semiconductor component including a circuit carrier with a plurality of inner contact pads, a semiconductor chip, and a plurality of electrical connections. An adhesion promotion layer is disposed on at least areas of the semiconductor component and a plastic encapsulation material encapsulates at least the semiconductor chip, the plurality of electrical connections and the plurality of the inner contact pads. Surface regions of the semiconductor component are selectively activated.
Claims24
A method of assembling a semiconductor package, the method comprising:
- (a) providing a semiconductor component including:
- a circuit carrier comprising:
- at least one device position, each device position comprising a die pad, a plurality of inner contact pads, a plurality of outer contact areas, and a rewiring structure electrically connecting the plurality of inner contact pads and the plurality of outer contact areas;
- at least one semiconductor chip comprising an active surface with integrated circuit devices and a plurality of chip bond pads and a passive surface being mounted on the die pad of at least one device position of the circuit carrier;
- and a plurality of electrical connections extending between and electrically connecting the plurality of chip bond pads with the plurality of inner contact pads of the circuit carrier;
- (b) selectively activating surface regions of the semiconductor component;
- (c) depositing material to form an adhesion promotion layer on at least areas of the semiconductor component such that the selectively activated surface regions of the semiconductor component have improved affinity for the material of the adhesion promotion layer;
- and
- (d) encapsulating at least the upper surface of the die pad, the semiconductor chip, the plurality of electrical connections and the plurality of the inner contact pads in plastic encapsulation material.
6 more elements
A semiconductor package, comprising:
- a semiconductor component comprising:
- a circuit carrier including a die pad, a plurality of inner contact pads, a plurality of outer contact areas, and a rewiring structure electrically connecting the plurality of inner contact pads and the plurality of outer contact areas;
- a semiconductor chip comprising an active surface with integrated circuit devices and a plurality of chip bond pads and a passive surface being mounted on the die pad;
- and a plurality of electrical connections extending between and electrically connecting the plurality of chip bond pads with the plurality of inner contact pads of the circuit carrier, wherein exposed regions of the chip bond pads are activated surface regions of the semiconductor component and surface regions of the semiconductor component other than the exposed regions of the chip bond pads are unactivated surface regions;
- an adhesion promotion layer comprising adhesion promotion material disposed on at least a portion of the activated surface regions and at least a portion of the unactivated surface regions of the semiconductor component, wherein the activated surface regions have a greater affinity for the adhesion promotion material in an activated state than in an unactivated state;
- and
- a plastic encapsulation material encapsulating at least the upper surface of the die pad, the semiconductor chip, the plurality of electrical connections, and the plurality of the inner contact pads.
4 more elements
A method of assembling a semiconductor package, the method comprising:
- (a) providing a semiconductor component including:
- a circuit carrier comprising:
- at least one device position, each device position comprising a die pad, a plurality of inner contact pads, a plurality of outer contact areas, and a rewiring structure electrically connecting the plurality of inner contact pads and the plurality of outer contact areas;
- at least one semiconductor chip comprising an active surface with integrated circuit devices and a plurality of chip bond pads and a passive surface being mounted on the die pad of at least one device position of the circuit carrier;
- and a plurality of electrical connections extending between and electrically connecting the plurality of chip bond pads with the plurality of inner contact pads of the circuit carrier;
- (b) selectively activating surface regions of the semiconductor component via chemical reaction, including exposed surfaces of the chip bond pads, wherein the chip bond pads comprise aluminum and the activation process forms hydroxy-enriched aluminum oxide along the exposed surfaces of the chip bond pads;
- (c) depositing an adhesion promotion layer on at least areas of the semiconductor component;
- and
- (d) encapsulating at least the upper surface of the die pad, the semiconductor chip, the plurality of electrical connections and the plurality of the inner contact pads in plastic encapsulation material.
6 more elements
Dependencies are inferred from the claim text.