Leadframe and semiconductor package made using the leadframe

A semiconductor package comprising:

• a chip pad having a first surface, a second surface opposite a central portion of the first surface, and a third surface opposite a peripheral portion of the first surface and surrounding the second surface, the third surface being recessed from the second surface;
• a plurality of leads each including an inner end adjacent to the chip pad, an opposite outer end, a first surface, a second surface opposite the first surface, a third surface which is opposite the first surface and extends between the second surface and the outer end, and a fourth surface which is opposite the first surface and extends between the second surface and the inner end;
• a semiconductor chip mounted on the first surface of the chip pad and in an electrical connection with the first surface of at least some of the leads;
• and
• a package body of a hardened encapsulant material over the chip and at least the first and third surfaces of the chip pad, wherein the third and fourth surfaces of each of the leads is covered by the encapsulant material, the second surface of each of the lead and the second surface of the chip pad are exposed in a plane of a first exterior surface of the package body, and a portion of the first surface of each of the leads is exposed in a plane of a second exterior surface of the package body.

A semiconductor package comprising:

• a chip pad;
• a plurality of leads each including an inner end adjacent to the chip pad, an opposite outer end, a generally planar first surface which extends to both the inner and outer ends, a generally planar second surface opposite the first surface, and a means for locking the lead to a package body which is opposite the first surface and extends to the outer end, the locking means further extending completely between the second surface and the outer end such that no portion of the second surface extends between the locking means and the outer end and the second surface is separated from the outer end by the locking means to reduce burr the formation on the second surface;
• a semiconductor chip mounted on the first surface of the chip pad and in an electrical connection with the first surface of at least some of the leads;
• and
• wherein the package body is a hardened encapsulant material and defines a first exterior surface, a second exterior surface which is opposite the first exterior surface, a first exterior first side surface which extends between the first and second exterior surfaces, and at second exterior second side surface which extends to the first exterior surface, the package body covering the chip and the locking means of each of the leads such that the second surface of each of the leads and the second surface of the chip pad are exposed in a plane of the first exterior surface of the package body, and a portion of the first surface of each of the leads which begins at the outer end is exposed in a plane of the second exterior surface of the package body such that the exposed portion of the first surface protrudes from the second exterior side surface.