Charge-trapping nonvolatile memory devices having gate structures therein with improved blocking layers
AssigneeSamsung Electronics Co., Ltd.
InventorsDong-Chul Yoo, Byong-Ju Kim, Han-Mei Choi, Ki-Hyun Hwang
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AssigneeSamsung Electronics Co., Ltd.
InventorsDong-Chul Yoo, Byong-Ju Kim, Han-Mei Choi, Ki-Hyun Hwang
Estimating the term…
Nonvolatile memory devices include a tunnel insulating layer on a substrate and a charge storing layer on the tunnel insulating layer. A charge transfer blocking layer is provided on the charge storing layer. The charge transfer blocking layer is formed as a composite of multiple layers, which include a first oxide layer having a thickness of about 1 Å to about 10 Å. This first oxide layer is formed directly on the charge storing layer. The charge transfer blocking layer includes a first dielectric layer on the first oxide layer. The charge transfer blocking layer also includes a second oxide layer on the first dielectric layer and a second dielectric layer on the second oxide layer. The first and second dielectric layers have a higher dielectric constant relative to the first and second oxide layers, respectively. The memory cell includes an electrically conductive electrode on the charge transfer blocking layer.
A gate structure, comprising:
A nonvolatile memory device, comprising:
A nonvolatile memory device, comprising:
Dependencies are inferred from the claim text.