Gate trim process using either wet etch or dry etch approach to target CD for selected transistors
AssigneeSpansion LLC
InventorsBradley M. Davis, Jihwan Choi, Angela T. Hui
Life of this patent
Estimating the term…
Abstract
Disclosed are methods and devices for targeting CD of selected transistors in a semiconductor device. Varying CD is done by forming hard mask lines in a hard mask layer that have varying amounts of spacer material associated therewith. Hard mask lines corresponding to selected transistors are either left covered or uncovered by a resist applied over the hard mask layer. Then, spacer material is selectively removed from the hard mask lines to vary the width of hard mask lines and associated side wall spacers. A gate layer is then etched through the spaces in the hard mask lines to form gate lines having varying widths and targeted CD.
Claims13
A method for forming a semiconductor device having transistors with targeted CDs, comprising:
- providing a semiconductor device comprising a hard mask layer formed over a gate material layer, wherein the hard mask layer is formed into a plurality of hard mask lines and a layer of spacer material formed over the plurality of hard mask lines;
- performing a first dry etch process to remove a portion of the spacer material, wherein the remaining spacer material adheres to the sides of the plurality of hard mask lines to form sidewall spacers;
- covering a first portion of the plurality of hard mask lines with a first resist;
- performing a second dry etch process on the semiconductor device having a plurality of hard mask lines covered with a first resist to substantially remove the sidewall spacers associated with the portion of the plurality of hard mask lines not covered by the first resist;
- removing the first resist from the plurality of hard mask lines;
- and
- contacting the gate material layer with an etchant to form gate lines
- after performing the first dry etch, covering a second portion of the plurality of hard mask lines and associated spacer sidewalls with a second resist and performing a second dry etch to remove substantially all of sidewall spacers from the portion of the plurality of hard mask lines not covered by the second resist.
A method for forming a semiconductor device having transistors with targeted CDs, comprising:
- providing a semiconductor device comprising a hard mask layer formed over a gate material layer, wherein the hard mask layer is formed into a plurality of hard mask lines and a layer of spacer material formed over the plurality of hard mask lines;
- performing a first dry etch process to remove a portion of the spacer material, wherein the remaining spacer material adheres to the sides of the plurality of hard mask lines to form sidewall spacers;
- covering a first portion of the plurality of hard mask lines with a first resist;
- performing a second dry etch process on the semiconductor device having a plurality of hard mask lines covered with a first resist to substantially remove the sidewall spacers associated with the portion of the plurality of hard mask lines not covered by the first resist;
- removing the first resist from the plurality of hard mask lines;
- and
- contacting the gate material layer with an etchant to form gate lines.
Dependencies are inferred from the claim text.