US 8,409,950 B1 · Method for integrating SONOS non-volatile memory into a sub-90 nm standard CMOS foundry process flow

Abstract

An embodiment of a method is disclosed to integrate silicon oxide nitride oxide silicon (SONOS) non-volatile memory (NVM) into a standard sub-90 nm complementary metal oxide semiconductor (CMOS) semiconductor foundry process flow. An embodiment of the method adds a few additional steps to a standard CMOS foundry process flow and makes minor changes to the rest of the baseline CMOS foundry process flow to form a new process module that includes both CMOS devices and an embedded SONOS NVM. An embodiment of the method utilizes new material sets (which are not utilized at larger nodes) that enhance NVM performance by improving charge tunneling behavior and reducing leakage currents. Furthermore, an embodiment of the method integrates CMOS with SONOS NVM at ever-shrinking dimensions while enhancing the NVM performance, without performing extra, costly processing steps.

Claims18

Dependent claims

A method for integrating a silicon oxide nitride oxide silicon (SONOS) non-volatile memory (NVM) into a standard sub-90 nm complementary metal oxide semiconductor (CMOS) foundry process flow, comprising:

performing standard CMOS foundry process flow, including:
forming an alignment layer on a silicon substrate;
forming twin-wells in the silicon substrate to form a plurality of devices on the silicon substrate;
and
isolating neighboring devices on the silicon substrate;
patterning, on the silicon substrate, a memory window implant layer using a memory window implant photoresist and a memory window implant mask, forming a patterned SONOS memory cell region of an embedded SONOS NVM;
patterning, on the silicon substrate, a stack removal photoresist layer defined by a stack removal photoresist mask, wherein the memory window implant mask is smaller than the stack removal photoresist mask;
and
depositing, on the silicon substrate, a high permittivity (high-k) gate oxide layer as a capping oxide layer.

6 more elements

Dependencies are inferred from the claim text.

Method for integrating SONOS non-volatile memory into a sub-90 nm standard CMOS foundry process flow

Life of this patent

Method for integrating SONOS non-volatile memory into a sub-90 nm standard CMOS foundry process flow

Life of this patent

Abstract

Claims18