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US 8,409,935 B2Granted
Method of manufacturing transparent transistor with multi-layered structures
AssigneeElectronics and Telcommunications Research Institute
InventorsMin Ki Ryu, Chi Sun Hwang, Chun Won Byun, Hye Yong Chu, Kyoung Ik Cho
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Abstract
A method of manufacturing a transparent transistor including a substrate, source and drain electrodes formed on the substrate, each having a multi-layered structure of a lower transparent layer, a metal layer and an upper transparent layer, a channel formed between the source and drain electrodes, and a gate electrode aligned with the channel. The lower transparent layer or the upper transparent layer is formed of a transparent semiconductor layer, which is the same as the channel.
Claims2
A method of manufacturing a transistor, comprising:
- sequentially stacking a transparent semiconductor layer, a metal layer and a transparent layer on a substrate and patterning these layers to define source and drain regions and a channel region;
- etching the transparent layer and the metal layer in the channel region to expose the transparent semiconductor layer;
- and
- forming an insulating layer to cover the exposed transparent semiconductor layer.
1 more element
Dependencies are inferred from the claim text.