Methods for fabricating integrated circuit systems including high reliability die under-fill

A method for fabricating an integrated circuit system comprising:

• fabricating integrated circuits in and on a semiconductor substrate including etching via openings into a front surface of the semiconductor substrate and filling the via openings with a conductive material to form through substrate vias;
• bonding the front surface of the semiconductor substrate to a carrier wafer;
• polishing a back side of the semiconductor substrate to expose a portion of the conductive material;
• forming a plurality of solder bumps on the back side in electrical contact with the conductive material;
• providing a dicing tape having a layer of under-fill material thereon;
• laminating the back side of the semiconductor substrate to the dicing tape;
• debonding the semiconductor substrate from the carrier wafer;
• dicing the semiconductor substrate and layer of under-fill material into individual integrated circuit chips;
• and
• assembling the individual integrated circuit chips and under-fill material on a second substrate.

A method for fabricating an integrated circuit system comprising:

• fabricating a plurality of integrated circuits in and on a semiconductor substrate, each of the integrated circuits including a plurality of metal filled vias extending from a front surface toward a back surface and a plurality of solder bumps on the front surface, each in electrical contact with one of the plurality of metal filled vias;
• bonding the front surface to a carrier wafer;
• polishing the back surface to thin the semiconductor substrate and to expose a portion of the plurality of metal filled vias;
• forming a redistribution layer on the back surface in electrical contact with the exposed portion of the plurality of metal filled vias;
• forming a plurality of back side solder bumps in electrical contact with the redistribution layer;
• providing a dicing tape having a layer of under-fill material thereon;
• laminating the back surface of the semiconductor substrate to the dicing tape, the under-fill material filling spaces between the back side solder bumps;
• removing the carrier wafer;
• dicing the semiconductor substrate and the layer of under-fill material to separate the plurality of integrated circuits into a plurality of individual integrated circuits;
• and
• attaching one of the plurality of individual integrated circuits to a second substrate and heating to cause the plurality of back side solder bumps to flow and to adhere to metallic pads on the second substrate.