Methods of forming memory cells
AssigneeMicron Technology, Inc.
InventorsJohn Smythe, Gurtej S. Sandhu
Life of this patent
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Abstract
Some embodiments include methods of forming memory cells utilizing various arrangements of conductive lines, electrodes and programmable material; with the programmable material containing high k dielectric material directly against multivalent metal oxide. Some embodiments include arrays of memory cells, with the memory cells including programmable material containing high k dielectric material directly against multivalent metal oxide.
Claims18
A method of forming a plurality of memory cells, comprising:
- forming spaced-apart conductive lines extending along a first axis;
- forming spaced-apart lines of programmable material over the conductive lines and extending along a second axis which intersects the first axis;
- the programmable material comprising high k dielectric material directly against multivalent metal oxide;
- and wherein:
- the conductive lines are formed in first trenches in a first dielectric material;
- a second dielectric material is formed over the first dielectric material and the conductive lines;
- multiple second trenches are formed through the second dielectric material to expose regions of the conductive lines;
- spaced-apart bottom electrodes are formed within the second trenches and directly over the conductive lines;
- and
- the lines of programmable material are formed within the second trenches over the spaced-apart bottom electrodes.
A method of forming a plurality of memory cells, comprising:
- forming spaced-apart conductive lines extending along a first axis;
- forming spaced-apart lines of programmable material over the conductive lines and extending along a second axis which intersects the first axis;
- the programmable material comprising high k dielectric material directly against multivalent metal oxide;
- wherein the conductive lines are first conductive lines within a first level of columns, and wherein the lines of programmable material are first lines of programmable material, and further comprising;
- forming a plurality of second conductive lines in one-to-one corresponding with the first lines of programmable material and extending along the second axis, the second conductive lines and the first lines of programmable material together being within a first level of rows that extends along the second axis;
- forming a second level of columns over the first level of rows, the second level of columns comprised third conductive lines extending along the first axis;
- and
- forming a second level of rows over the second level of columns;
- the second level of rows extending along the second axis, and comprising second lines of programmable material together with fourth conductive lines;
- the second lines of programmable material comprising high k dielectric material directly against multivalent metal oxide;
- the fourth conductive lines being electrically coupled to the second lines of programmable material through top electrode material that directly contacts the fourth conductive lines and directly contacts the high k dielectric material of the second lines of programmable material.
A method of forming a plurality of memory cells, comprising:
- forming first conductive lines within first trenches in a first dielectric material;
- the first trenches extending along a first axis;
- forming second dielectric material over the first dielectric material, and patterning the second dielectric material to have openings extending therethrough to the first conductive lines;
- forming memory cells within the openings, each of the memory cells comprising programmable material sandwiched between top and bottom electrodes;
- the programmable material comprising a high k dielectric portion directly against a multivalent metal oxide portion;
- forming a third dielectric material over the second dielectric material and patterning the third dielectric material to have second trenches over the memory cells, the second trenches extending along a second axis which intersects the first axis;
- and
- forming second conductive lines within the second trenches.
A method of forming a plurality of memory cells, comprising:
- forming first conductive lines extending along a first axis;
- forming spaced-apart bottom electrodes along each of the conductive lines;
- forming programmable material over and in direct contact with the bottom electrodes;
- the programmable material comprising a high k dielectric portion directly against a multivalent metal oxide portion;
- forming top electrode material over and directly against the high k dielectric portion of the programmable material;
- forming patterned electrically conductive hard mask material over the top electrode material;
- the patterned hard mask material comprising masking lines extending along a second axis which is substantially perpendicular to the first axis;
- transferring a pattern from the patterned electrically conductive hard mask material into the top electrode material to pattern the top electrode material into lines;
- the programmable material comprising cell regions directly between top electrode material lines and bottom the electrodes, and comprising intervening regions between the cell regions;
- and
- forming second conductive lines directly over the masking lines, the second conductive lines extending along the second axis.
A method of forming a plurality of memory cells, comprising:
- forming a first conductive line within a first trench in a first dielectric material;
- the first trench extending along a first axis;
- forming second dielectric material over the first dielectric material, and patterning the second dielectric material to have openings extending therethrough to the first conductive line;
- forming bottom electrode material along bottoms of the openings:
- forming multivalent metal oxide within the openings over the bottom electrode material, the multivalent metal oxide and bottom electrode material together forming a plurality of memory cell plugs;
- forming an expanse of high k dielectric material that extends across the memory cell plugs;
- forming a protective layer over the high k dielectric material;
- forming a third dielectric material over the protective layer and patterning the third dielectric material to have second trenches over the protective layer, the second trenches extending along a second axis which intersects the first axis;
- extending the second trenches through the protective layer to an upper surface of the high k dielectric material;
- forming top electrode material within bottoms of the second trenches;
- and
- forming second conductive lines over the top electrode material within the second trenches.
A method of forming a plurality of memory cells, comprising:
- forming a first conductive line extending along a first axis;
- forming first electrode material along the first conductive line;
- forming an expanse of first programmable material over and in direct contact with the first electrode material;
- the first programmable material comprising a first high k dielectric portion over and directly against a first multivalent metal oxide portion;
- forming second electrode material over the first programmable material;
- forming patterned electrically conductive hard mask material over the second electrode material;
- the patterned hard mask material comprising spaced-apart masking features;
- transferring a pattern from the patterned electrically conductive hard mask material into the second electrode material;
- the patterned second electrode material comprising spaced-apart segments;
- the first programmable material comprising first cell regions directly beneath the second electrode material segments, and comprising first intervening regions between the first cell regions;
- forming electrically conductive structures over the masking features of the electrically conductive hard mask material;
- the electrically conductive structures including second conductive lines that extend along a second axis which is substantially perpendicular to the first axis;
- the electrically conductive structures having upper pedestals, the upper pedestals having caps corresponding to third electrodes;
- forming an expanse of second programmable material over and in direct contact with the third electrode caps;
- the second programmable material comprising a second multivalent metal oxide portion over and directly against a second high k dielectric portion;
- forming fourth electrodes over and directly against the second programmable material;
- the second programmable material comprising second cell regions directly beneath the fourth electrodes, and comprising second intervening regions between the second cell regions, and
- forming a third conductive line extending across the fourth electrodes.
Dependencies are inferred from the claim text.