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US 8,409,881 B2Granted
Multi-project wafer and method of making same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWilliam Cheng, Mirng-Ji Lii, Chen-Yung Ching, Hsin-Hui Lee
Life of this patent
Estimating the term…
Abstract
A semiconductor wafer is fabricated. The wafer has a plurality of dies. The plurality of dies include at least operable dies of a first type and operable dies of a second type different from the first type. The dies of the second type are rendered inoperable, while keeping the dies of the first type operable. The wafer is provided with the operable dies of the first type and the inoperable dies of the second type on it, for testing of the dies of the first type.
Claims10
A multi-project wafer,
- said wafer having a plurality of operable dies of a first design;
- said wafer having a plurality of individual dies of a second design different from the first design, the individual dies of the second design having an active surface with electrodes, external terminals, and interconnect paths extending between the electrodes and the external terminals, wherein the interconnect paths of the individual dies of the second design are mechanically cut resulting in severing the electrical paths of the individual dies of the second design and rendering the individual dies of the second design inoperable.
A multi-project wafer,
- said wafer having a plurality of operable dies of a first design, the dies of the first design having an active surface with first electrodes, first external terminals, and first interconnect paths that connect the first electrodes and the first external terminals;
- said wafer having a plurality of individual dies of a second design different from the first design, the individual dies of the second design having an active surface with second electrodes, wherein the dies of the second design do not have back end of line interconnect layers, rendering the individual dies of the second design inoperable.
Dependencies are inferred from the claim text.