US 8,397,016 B2 · Efficient use of hybrid media in cache architectures

Abstract

A multi-tiered cache manager and methods for managing multi-tiered cache are described. Multi-tiered cache manager causes cached data to be initially stored in the RAM elements and selects portions of the cached data stored in the RAM elements to be moved to the flash elements. Each flash element is organized as a plurality of write blocks having a block size and wherein a predefined maximum number of writes is permitted to each write block. The portions of the cached data may be selected based on a maximum write rate calculated from the maximum number of writes allowed for the flash device and a specified lifetime of the cache system.

Claims6

Dependent claims

A multi-tiered cache system, comprising:

a plurality of cache elements including RAM and flash elements;
and
a manager configured to control access to the cache elements,
wherein the manager causes cached data to be initially stored in the RAM elements and selects portions of the cached data stored in the RAM elements to be written to the flash elements based on at least a maximum write rate calculated from the maximum number of writes associated with the flash elements and a specified lifetime of the cache system,
wherein each RAM element is organized as a plurality of RAM blocks, and
wherein each of the portions of the cached data is moved when no RAM block is available for storing new data, and
wherein no RAM block is available when no available RAM block is large enough to store new cached data.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application

12/650,966Filed 31 Dec 2009 · us provisional application

Priority

31 Dec 2008

Published

US 2011/0145479 A116 Jun 2011

Granted

12 Mar 2013

Term ends

Not estimatedThe source records don’t support an estimate.

Classification8 codes

G06F 12/0246
Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory: in block erasable memory, e.g. flash memory
G06F 12/02
Accessing, addressing or allocating within memory systems or architectures: addressing or allocation; Relocation
G06F 12/0806
Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches: multiuser,…
G06F 12/0897
Caches characterised by their organisation or structure: with two or more cache hierarchy levels

Efficient use of hybrid media in cache architectures

Life of this patent

Efficient use of hybrid media in cache architectures

Life of this patent

Abstract

Claims6