IIR sliding window integrator and search engine delay component for reducing the preamble size of a discovery burst

A method comprising:

• combining a plurality of input bits to produce a first correlator output, wherein combining the plurality of input bits comprises correlating differential values to obtain a plurality of first results and summing the plurality of first results to obtain the first correlator output;
• using the first correlator output, filling a register with a first accumulator value followed by a series of other accumulator values;
• shifting the plurality of input bits;
• combining the shifted plurality of input bits to produce a second correlator output comprising a next accumulator value, wherein combining the shifted plurality of input bits comprises correlating differential values to obtain a plurality of second results and summing the plurality of second results to obtain the second correlator output;
• adding a function of the first accumulator value to the next accumulator value to obtain a modified next accumulator value;
• inputting the modified next accumulator value to the register while shifting the series of other accumulator values in the register;
• and
• comparing the modified next accumulator value with a threshold value to determine if a specified signal or a specified portion of a signal is detected.

An apparatus comprising:

• a combining circuit configured to combine a plurality of input bits to produce a correlator output by correlating differential values to obtain a plurality of first results and summing the plurality of first results to obtain the first correlator output, wherein the combining circuit is further configured to combine a shifted plurality of the input bits to produce a next correlator output by correlating differential values to obtain a plurality of second results and summing the plurality of second results to obtain the second correlator output;
• a delay register, having an input coupled to an output of the combining circuit, configured to serially store a plurality of accumulator values, wherein the serially-stored plurality of accumulator values comprises the correlator outputs;
• and
• a feedback circuit, coupled to the delay register, configured to add a function of an output of the delay register to a next accumulator value of the delay register to obtain a modified next accumulator value.

A method comprising:

• using a plurality of input values received at an electronic device, determining within the electronic device a frequency of a corresponding signal to be within a first frequency band;
• storing within the electronic device at least a portion of the plurality of input values;
• using the stored at least a portion of the plurality of input values, determining within the electronic device the frequency of the signal to be within a second frequency, wherein the second frequency band is a subset of the first frequency band;
• and
• using the second frequency band and the stored at least a portion of the plurality of input values, determining within the electronic device the frequency of the signal to be within a third frequency band, wherein the third frequency band is a subset of the second frequency band.

A method comprising:

• using a plurality of input values, determining a frequency of a corresponding signal to be within a first frequency band;
• storing at least a portion of the plurality of input values;
• using the stored at least a portion of the plurality of input values, determining the frequency of the signal to be within a second frequency, wherein the second frequency band is a subset of the first frequency band;
• and
• using the second frequency band and the stored at least a portion of the plurality of input values, determining the frequency of the signal to be within a third frequency band, wherein the third frequency band is a subset of the second frequency band,
• wherein storing the at least a portion of the plurality of input values comprises using a delay component.

An apparatus comprising:

• a first frequency search engine configured to receive a plurality of input values and to determine a frequency of a corresponding signal to be within a first frequency band;
• a delay component, having an input coupled to an input of the first frequency search engine, configured to store at least a portion of the plurality of input values;
• a second frequency search engine, having inputs coupled to an output of the delay component and to an output of the first frequency search engine, configured, using the stored at least a portion of the plurality of input values and the first frequency band, to determine the frequency of the signal to be within a second frequency band, where the second frequency band is a subset of the first frequency band;
• and
• a third frequency search engine, having inputs coupled to an output of the delay component and to an output of the second frequency search engine, configured to determine the frequency of the signal, wherein the frequency is a subset of the second frequency band.

An apparatus comprising:

• means for receiving a plurality of input values;
• means for determining a frequency of a signal corresponding to the plurality of input values to be within a first frequency band;
• first means for storing at least a portion of the plurality of input values;
• second means for storing at least a portion of the at least portion of the plurality of input values;
• and
• using the first frequency band and the stored at least a portion of the plurality of input values, means for determining the frequency of the signal to be within a second frequency band wherein the second frequency band is a subset of the first frequency band and further for determining the frequency of the signal to be within a third frequency band where the third frequency band is a subset of the second frequency band.