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US 8,395,413 B2Granted
Logic circuit without enhancement mode transistors
AssigneeTriQuint Semiconductor, Inc.
InventorHaoyang Yu
Life of this patent
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Abstract
Embodiments of circuits, methods and systems for powering various stages of a logic circuit are disclosed. Some embodiments include a circuit having a logic circuit with an input stage and an output stage; a heterojunction bipolar transistor configured to provide a first switched supply voltage to power components of the input stage; and a depletion mode field effect transistor configured to provide a second switched supply voltage to power components of the output stage. Other embodiments may also be described and claimed.
Claims13
A circuit comprising:
- a logic circuit having an input stage and an output stage;
- and
- a plurality of transistors coupled with and configured to power the logic circuit, wherein the plurality of transistors does not include an enhancement mode field effect transistor (EFET) and does include:
- a heterojunction bipolar transistor (HBT) coupled with the input stage and configured to provide a first switched supply voltage to power a first one or more components of the input stage;
- and
- a depletion mode field effect transistor (DFET) coupled with the output stage and configured to provide a second switched supply voltage to power a second one or more components of the output stage;
- wherein during a first mode of operation, the HBT and the DFET are turned on, and the second switched supply voltage is substantially higher than the first switched supply voltage.
4 more elements
A circuit comprising:
- a logic circuit having an input stage and an output stage;
- a first heterojunction bipolar transistor (HBT) coupled with the input stage and configured to provide a first switched supply voltage to power a first one or more components of the input stage;
- a depletion mode field effect transistor (DFET) coupled with the output stage and configured to provide a second switched supply voltage to power a second one or more components of the output stage;
- a second HBT configured to selectively ground the second one or more components;
- a transistor having:
- a first terminal configured to receive a supply voltage;
- a control terminal configured to receive a control voltage;
- and
- a second terminal configured to provide a third switched supply voltage;
- and
- a diode configured to receive the third switched supply voltage, wherein an output of the diode is configured to control the second HBT.
8 more elements
A system comprising:
- a power amplifier;
- a logic circuit configured to control the power amplifier, the logic circuit having an input stage and an output stage;
- a plurality of transistors coupled with and configured to power the logic circuit, wherein the plurality of transistors does not include an enhancement mode field effect transistor and does include a heterojunction bipolar transistor (HBT) configured to provide a first switched supply voltage to power a first one or more components of the input stage;
- and
- a depletion mode field effect transistor (DFET) configured to provide a second switched supply voltage to power a second one or more components of the output stage;
- wherein during a first mode of operation, the HBT and the DFET are turned on, and the second switched supply voltage is substantially higher than the first switched supply voltage.
3 more elements
Dependencies are inferred from the claim text.