Controlling device of a liquid crystal display

A shift error correction circuit, for using in a video processing circuit, wherein the video processing circuit comprises an analog to digital interface for receiving an analog video signal and converting to a digital video color level, the shift error correction circuit comprising:

• a shift error detection circuit, receiving a digital color level average directly from the analog to digital interface and a target value for generating a shift error so as to output a correction value directly to the analog to digital interface, wherein the target value is corresponding to a reference potential;
• a feedback filter, coupled to the shift error detection circuit, for calculating and generating a feedback error for correction according to the shift error;
• and
• an infinite impulse response (IIR) filter, for receiving a digital video color level and a correction signal, wherein the correction signal is sent out by a clamping pulse generator that generates the correction signal at a blanking interval within a cycle period of a horizontal synchronizing signal;
• an add/subtract processing unit directly receiving a feed forward target value and directly receiving the feedback error from the feedback filter and outputting a correction value to the A/D interface so as to correct the conversion error of the A/D interface.

A controlling device of a liquid crystal display, comprising:

• a video processing circuit, comprising:
• an analog to digital interface, having an input end for receiving an analog video signal for being converted, so as to output a digital video color level;
• a sampler, coupled between a reference potential and the input end of the analog to digital interface, and having a controlling end for receiving a correction signal;
• and a shift error correction circuit, receiving the digital video color level directly from the analog to digital interface, the correction signal, and a target value corresponding to the reference potential for outputting a correction value directly to the analog to digital interface;
• a clamping pulse generator that generates the correction signal, directly connected to the sampler and the shift error correction circuit, receiving a horizontal synchronizing signal so as to generate the correction signal at a blanking interval within the horizontal synchronizing signal, sending the correction signal to the shift error connection circuit, and sending the same error correction signal to the sampler to turn the sampler on or off;
• an image scaling circuit, coupled to the video processing circuit, for receiving and transmitting the digital video color level;
• and an interface signal transmission circuit, coupled to the image scaling circuit, for receiving and transmitting the digital video color level.