Plasma display panel having low residual stress

A plasma display panel comprising:

• a front panel;
• and
• a back panel,
• wherein the front panel and the back panel are disposed facing each other, and peripheries of the front panel and the back panel are sealed to form a discharge space,
• the front panel has display electrodes, a dielectric layer, and a protective layer on a front substrate,
• the back panel has electrodes, barrier ribs, and a phosphor layer on a back substrate,
• wherein the display electrodes and the dielectric layer of the front panel are configured such that, in a graph in which an area percentage of the display electrodes in an area of an image display region of the front panel is expressed by a longitudinal axis, and a difference between a coefficient of expansion of the front substrate from room temperature to 300° C. and a coefficient of expansion of the dielectric layer from room temperature to 300° C. is expressed by a lateral axis, the area percentage and the difference between the coefficients of expansion stay within a region formed by connecting
• coordinates (35×10−7/° C., 60%),
• coordinates (8×10−7/° C., 60%),
• coordinates (5×10−7/° C., 40%), and
• coordinates (23×10−7/° C., 40%)
• in the mentioned order with a straight line where the straight line is included,
• wherein a content of MoO3 in the dielectric layer is 0.3 mol % or more and 2 mol % or less.