Apparatus and methods for biasing amplifiers

A method of biasing a transconductance amplifier, the method comprising:

• amplifying a differential input voltage using a first metal oxide semiconductor (MOS) transistor and a second MOS transistor to generate a voltage across a resistor;
• generating a current using the resistor based on the voltage across the resistor, wherein at least a portion of the current is configured to pass through a source and a drain of a third MOS transistor and through a source a drain of fourth MOS transistor to generate a differential output current;
• controlling a voltage of the gate of the third MOS transistor using a first amplifier having a first input electrically coupled to a source of the first MOS transistor and a second input electrically coupled to a drain of the first MOS transistor, wherein the first amplifier controls the gate of the third MOS transistor so as to control a difference in voltage between the drain and the source of the first MOS transistor;
• and
• controlling a voltage of the gate of the fourth MOS transistor using a second amplifier having a first input electrically coupled to a source of the second MOS transistor and a second input electrically coupled to a drain of the second MOS transistor, wherein the second amplifier controls the gate of the fourth MOS transistor so as to control a difference in voltage between the drain and the source of the second MOS transistor.

An apparatus, comprising:

• a first transconductance amplifier having a first voltage input, a second voltage input, a first current output, and a second current output, the first transconductance amplifier comprising:
• a resistor;
• a first transistor having a gate, a drain, and a source, the gate electrically connected to the first voltage input;
• a second transistor having a gate, a drain, and a source, the gate electrically connected to the second voltage input, wherein the first and second transistors are configured to generate a voltage across the resistor resulting in a current, wherein a difference in output currents between the first and second current outputs corresponds to the current;
• a first means for controlling having a first input, a second input, and an output, the first and second inputs electrically connected to the drain and to the source of the first transistor, respectively;
• a third transistor having a gate, a drain, and a source, wherein the drain and the source of the third transistor are disposed in a signal path between the source of the first transistor and the first current output, and wherein the first controlling means is configured to control the voltage of the gate of the third transistor so as to control a difference in voltage between the drain and the source of the first transistor;
• a second means for controlling having a first input, a second input, and an output, the first and second inputs electrically connected to the drain and to the source of the second transistor, respectively;
• and
• a fourth transistor having a gate, a drain, and a source, wherein the drain and the source of the fourth transistor are disposed between the source of the second transistor and the second current output, and wherein the second controlling means is configured to control the voltage of the gate of the fourth transistor so as to control a difference in voltage between the drain and the source of the second transistor.