Power switch design method and program

#The present invention relates to a method of designing a power switch block for an integrated circuit layout in a predefined integrated circuit technology.

#The present invention further related to a computer program product implementing such a method.

#Nowadays, many integrated circuits (ICs) are designed to perform a wide variety of computational tasks. To this end, such an IC may comprise a plurality of different circuit portions, e.g. cores, each designed to perform one of said computational tasks. An example of such a multi-tasking IC design is the system-on-chip concept. Usually, such ICs perform only a subset of the computational tasks at the same time, which means that the other circuit portions do not perform any tasks. To avoid unnecessary power consumption by such idle circuit portions, these circuit portions are temporarily disconnected from the power supply until their functionality is required again.

#Embodiments of the invention are described in more detail and by way of non-limiting examples with reference to the accompanying drawings, wherein

#FIG. 1 shows a part of an IC;

#FIG. 2 shows a layout of a power switch block;

#It should be understood that the Figures are merely schematic and are not drawn to scale. It should also be understood that the same reference numerals are used throughout the Figures to indicate the same or similar parts.

#In accordance with the method of the present invention, the dimension of the power switch block 200 is designed in such a way that the total area covered by the power switch block 200 is minimized. The method of the present invention is based on the realization that for a given IC technology, although the various components of the power switch block 200 may have dimensions that are more or less fixed within the given IC technology, the layout of some components, such as the first power switch 115 and the second power switch 135 may be optimized within the dimensions constraints to optimize the performance of such a component within the power switch block 200. In other words, some components are designed on-the-fly instead of taken from a standard library to optimize the performance of these components. This is particularly applicable to the power switches 115 and 135, because different performance requirements of the power switch block 200 typically directly affects the performance requirements of these switches.

#The method of the present invention may be applied to any suitable IC technology in which power switches, e.g. transistors, of opposite conductivity type are used. However, for reasons of brevity, the remainder of this description will be limited to CMOS technology, in which the first power switch 115 is a pMOS switch, and in which the second power switch 135 is an nMOS switch.