Skewed double differential pair circuit for offset cancellation

A differential system with offset cancellation comprising:

• a first and a second input;
• a first differential stage, asymmetric in a first direction, for receiving the first and second inputs and generating a first portion of an output;
• a second differential stage, asymmetric in a second direction, for receiving the first and second inputs and generating a second portion of the output;
• a calibration circuit for sampling the output in a calibration mode and biasing at least one of the first and second differential stages to set the output to a target value;
• and
• a comparator, the comparator is responsive to the output and directs the calibration circuit to bias at least one of first and second differential stages to set the output to the target value.

A method of offset cancellation in a differential system of a semiconductor circuit, the method comprising:

• connecting a first and a second input to a differential system;
• coupling the differential system to an equi-potential source during a calibration mode;
• comparing a true and a compliment output of the differential system to determine the direction of the offset in the calibration mode;
• and
• determining a plurality of bias values of the differential system which substantially cancels the offset in both the calibration mode and a functional mode using a computer.