Data access method for flash memory and storage system and controller thereof
AssigneePhison Electronics Corp.
InventorsChien-Hua Chu, Kuo-Yi Cheng
Life of this patent
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Abstract
A data access method for accessing data in a flash memory is provided, wherein the data has a plurality of sub-data. The data access method includes generating an error correction code (ECC) for the data and writing the data and the ECC into the flash memory. The data access method also includes generating a corresponding bit checking code for each of the sub-data and writing the bit checking codes into the flash memory. When the sub-data subsequently is read from the flash memory, whether the sub-data contains any error is determined only according to the bit checking code corresponding to the sub-data. Thereby, the data access efficiency is improved.
Claims25
A data access method, for accessing data in a flash memory, the data access method comprising:
- receiving the data from a host system, wherein the data comprises a plurality of sub-data;
- generating an error correction code (ECC) for the data;
- writing the data and the ECC into the flash memory;
- generating a bit checking code for each of the sub-data by a bit checking unit;
- and
- writing the bit checking codes into the flash memory by a memory operation unit.
A flash memory controller, for accessing data in a flash memory, the flash memory controller comprising:
- a microprocessor unit;
- a host interface unit, coupled to the microprocessor unit, is used to connect with a host system and receive the data from the host system, wherein the data comprises a plurality of sub-data;
- a flash memory interface unit, coupled to the microprocessor unit, is used to connect with the flash memory;
- a memory operation unit, coupled to the microprocessor unit;
- an error correction unit, coupled to the microprocessor unit, is used to generate an ECC for the data, wherein the memory operation unit writes the data and the ECC into the flash memory;
- and
- a bit checking unit, coupled to the microprocessor unit, is used to generate a bit checking code for each of the sub-data, wherein the memory operation unit writes the bit checking codes into the flash memory.
A flash memory storage system, comprising:
- a flash memory;
- and
- a flash memory controller, coupled to the flash memory, is used to receive data from a host system, wherein the data comprises a plurality of sub-data,
- wherein the flash memory controller generates an ECC for the data and writes the data and the ECC into the flash memory,
- wherein the flash memory controller has a bit checking unit for generating a bit checking code for each of the sub-data and a memory operation unit for writing the bit checking codes into the flash memory.
Dependencies are inferred from the claim text.