Programmable controller for executing a plurality of independent sequence programs in parallel
AssigneeFanuc Corporation
InventorsMasuo Kokura, Yasushi Nomoto, Motoyoshi Miyachi
Life of this patent
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Abstract
A programmable controller which executes a plurality of independent sequence programs in parallel is provided with an ASIC, including a plurality of arithmetic-logic units and a plurality of arbitration circuits, and MPUs as many as the arbitration circuits. The entire execution time of the programmable controller is shortened by changing combinations (groups of arithmetic-logic units) of the MPUs (and the arbitration circuits as many as the MPUs) and the arithmetic-logic units, based on the ratios of MPU execution instructions and ASIC execution instructions included in those instructions which constitute the programs to be executed in parallel.
Claims6
A programmable controller which executes a plurality of independent sequence programs in parallel, the programmable controller comprising:
- a plurality of arithmetic-logic units configured to execute predetermined first instructions in the sequence programs by hardware;
- a plurality of MPUs configured to execute second instructions in the independent sequence programs, from among the plurality of independent sequence programs executed in parallel, which can not be executed by the arithmetic-logic units;
- first transfer means configured to transfer information associated with at least one of the second instructions generated in the arithmetic-logic units to the MPUs in the order of execution of the instructions;
- and
- second transfer means configured to transfer information associated with results of execution of the second instructions executed by the MPUs to the arithmetic-logic units which are sources of generation of the information associated with the second instructions, wherein
- the plurality of arithmetic-logic units are divided into groups as many as the MPUs, each of the groups including at least one arithmetic-logic unit;
- at least one of the groups includes at least two arithmetic-logic units, and the first and second transfer means and the MPUs are arranged in association with a group including the at least two arithmetic-logic units;
- and
- said programmable controller further comprises selection means for selecting, when grouping the arithmetic-logic units into a plurality of groups, respective groups to which individual arithmetic-logic unit is caused to belong.
Dependencies are inferred from the claim text.