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US 8,301,849 B2Granted
Transactional memory in out-of-order processors with XABORT having immediate argument
AssigneeIntel Corporation
InventorsRavi Rajwar, Martin G. Dixon, Konrad K. Lai
Life of this patent
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Abstract
Methods, systems, and apparatuses to provide an XABORT in a transactional memory access system are described. In one embodiment, the stored value is a context value indicating the context in which a transactional memory execution was aborted. A fallback handler may use the context value to perform a series of operations particular to the context in which the abort occurred.
Claims20
A method comprising:
- receiving instruction to abort a transactional memory access, wherein the instruction includes an immediate argument;
- and
- in response to the instruction, aborting the transactional memory access and storing the immediate argument in a first storage unit.
An apparatus comprising:
- a decode unit to receive an instruction to abort a transactional memory execution, wherein the instruction includes an immediate argument;
- and
- an execution unit to abort a transactional memory access and store the immediate argument in a first storage unit.
A system comprising:
- a memory to store data;
- and
- a processor comprising:
- a decode unit to receive an instruction to abort a transactional memory access, wherein the instruction includes an intermediate argument;
- and
- an execution unit to abort a transactional memory access and store the intermediate argument in the first storage unit.
3 more elements
Dependencies are inferred from the claim text.