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US 8,301,829 B2Granted
Flash memory device and flash memory system including buffer memory
AssigneeSamsung Electronics Co., Ltd.
InventorJin-Yub Lee
Life of this patent
Estimating the term…
Abstract
A flash memory device includes a flash memory and a buffer memory. The flash memory is divided into a main region and a spare region. The buffer memory is a random access memory and has the same structure as the flash memory. In addition, the flash memory device further includes control means for mapping an address of the flash memory applied from a host so as to divide a structure of the buffer memory into a main region and a spare region and for controlling the flash memory and the buffer memory to store data of the buffer memory in the flash memory or to store data of the flash memory in the buffer memory.
Claims18
A flash memory device comprising:
- a flash memory including a first plurality of pages, each page being divided into a first main region and a first spare region;
- a buffer memory for temporarily storing data to be written in the flash memory or data to be read from the flash memory, the buffer memory including a second plurality of pages being divided into a second main region and a second spare region;
- a register configured to store an address of the flash memory, an address of the buffer memory, and an operation command of the flash memory and the buffer memory;
- and
- a control circuit including a buffer controller configured to control read or write operations of the buffer memory, and a decoder to map an address applied from the buffer controller, wherein the decoder separates an address input to the buffer memory into the second main region and the second spare region, the control circuit configured to (a) convert a control signal, an address and data from a host into an internal signal for operating the flash memory device, (b) map an address from the host to a mapped address of the buffer memory, in response to the internal signal, the addresses stored in the register, and the operation command stored in the register, and (c) control data stored in the mapped address of the buffer memory to be stored in the flash memory or control control the data of the flash memory to be stored in the mapped address of the buffer memory,
- wherein the first main region and the second main region have a first capacity and the first spare region and the second spare region have a second capacity, the first capacity being greater than the second capacity, and each page in the flash memory and in the buffer memory having equal capacity.
3 more elements
A flash memory system comprising:
- a host;
- and
- a flash memory device configured to store data or output stored data according to a request of the host, wherein the flash memory device includes a flash memory including a first plurality of pages, each page being divided into a first main region and a first spare region, a buffer memory for temporarily storing data to be written in the flash memory or data to be read from the flash memory, the buffer memory including a second plurality of pages being divided into a second main region and a second spare region, and a control circuit configured to map an address of the flash memory applied from the host to be suitable to the buffer memory and controlling the flash memory and the buffer memory to store data of the buffer memory in the flash memory or to store data of the flash memory in the buffer memory, the control circuit including a buffer controller configured to control read or write operations of the buffer memory, and a decoder to map an address applied from the buffer controller, wherein the decoder separates an address input to the buffer memory into the second main region and the second spare region;
- and
- a register configured to store an address of the flash memory, an address of the buffer memory, and an operation command of the flash memory and the buffer memory,
- wherein the control circuit is further configured to (a) convert a control signal, an address and data from the host into an internal signal for operating the flash memory device, (b) map an address from the host to a mapped address of the buffer memory, in response to the internal signal, the addresses stored in the register, and the operation command stored in the register, and (c) control data stored in the mapped address of the buffer memory to be stored in the flash memory or control the data of the flash memory to be stored in the mapped address of the buffer memory,
- wherein the first main region and the second main region have a first capacity and the first spare region and the second spare region have a second capacity, the first capacity being greater than the second capacity, and each page in the flash memory and in the buffer memory having equal capacity.
4 more elements
Dependencies are inferred from the claim text.