Method, apparatus and system for frequency synchronization between devices communicating over a packet network

#The present application is related to commonly-assigned U.S. patent application Ser. No. 12/339,333 entitled “Frequency Synchronization Using First and Second Frequency Error Estimators,” and Ser. No. 12/339,343 entitled “Frequency Synchronization with Compensation of Phase Error Accumulation Responsive to a Detected Discontinuity,” both of which are filed concurrently herewith and incorporated by reference herein.

#The present invention relates generally to communication systems, and more particularly to techniques for providing frequency synchronization between endpoint devices or other communication devices of such systems.

#Synchronous communication between endpoint devices such as data or voice transport using an International Telecommunications Union (ITU) Synchronous Digital Hierarchy (SDH) or Plesiochronous Digital Hierarchy (PDH) transmission system over an asynchronous packet network such as an Ethernet Transport and Access Network (EATN) or Metropolitan Ethernet Network (MEN) often requires that the devices have some mechanism for achieving frequency synchronization. One technique that allows transport of SDH or PDH links over a packet network is the Circuit Emulation Service (CES), in which bits from one or more consecutive TDM frames are encapsulated in an Ethernet packet. See, for example, MEF8, Implementation Agreement for the Emulation of PDH Circuits over Metro Ethernet Networks, Metro Ethernet Forum, October 2004, and IETF RFC 4553, A. Vainshtein and Y. J. Stein, “Structure-agnostic time division multiplexing (TDM) over packet (SATOP),” June 2006.

#FIG. 1 is a block diagram of a communication system in an illustrative embodiment of the invention.

#FIG. 2 shows a more detailed view of first and second communication devices in one possible implementation of the FIG. 1 system.

#FIG. 3 illustrates a communication protocol that may be carried out between the first and second communication devices of FIG. 2.

#The present invention will be illustrated herein in conjunction with exemplary communication systems and associated techniques for frequency synchronization in such systems. It should be understood, however, that the invention is not limited to use with the particular types of communication systems and frequency synchronization processes disclosed. The invention can be implemented in a wide variety of other communication systems, using alternative processing circuitry arrangements and process steps. For example, although illustrated in the context of a communication system involving synchronous service over an asynchronous packet network such as an EATN or MEN, the disclosed techniques can be adapted in a straightforward manner to a variety of other types of communication systems, including cellular systems, WiMAX systems, Wi-Fi systems, multiple-input multiple-output (MIMO) wireless systems, etc.

#FIG. 1 shows a communication system 100 comprising a plurality of endpoint devices 102-1, 102-2 and 102-3 coupled to a packet network 104. A given endpoint device may comprise, for example, a computer, a wireless service base station, a mobile telephone, or any other type of communication device. One or more of the endpoint devices 102 are configured to incorporate a frequency synchronization functionality using a clock recovery loop as will be described in greater detail below. The particular number of endpoint devices shown in FIG. 1 is illustrative only and a given implementation may include more or fewer such devices. The packet network 104 is assumed to be an asynchronous packet network such as an Ethernet network. The network may or may not support QoS assignments. It may additionally or alternatively comprise other types of networks, in any combination.

#Frequency synchronization in the present embodiment is carried out between a pair of endpoint devices 102, one of which is designated as a master device and the other which is designated as a slave device. FIG. 2 shows a more detailed view of a given pair of endpoint devices 102-1 and 102-2 which are illustratively designated as master and slave, respectively. It should be noted that these designations are arbitrary, and a given endpoint device may operate as a master in one synchronization process and a slave in another synchronization process. Thus, each endpoint device may incorporate both master and slave functionality, with the particular functionality being selectable at run time. Alternatively, a particular endpoint device may include only master functionality or only slave functionality.