Sub volt flash memory system
AssigneeSilicon Storage Technology, Inc.
InventorsHieu Van Tran, Sang T. Nguyen, Anh Ly, Hung Q. Nguyen
Life of this patent
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Abstract
Various circuits include MOS transistors that have a bulk voltage terminal for receiving a bulk voltage that is different from a supply voltage and ground. The bulk voltage may be selectively set so that some MOS transistors have a bulk voltage set to the supply voltage or ground and other MOS transistors have a bulk voltage that is different. The bulk voltage may be set to forward or reverse bias pn junctions in the MOS transistor. The various circuits include comparators, operational amplifiers, sensing circuits, decoding circuits and the other circuits. The circuits may be included in a memory system.
Claims9
A method for controlling a memory operation on a flash memory, the method comprising:
- applying a preemphasis signal on a signal line coupled to a plurality of memory cells, the preemphasis signal having at least one characteristic dependent on loading of the signal line.
Dependencies are inferred from the claim text.