Sense amplifier and semiconductor apparatus including the same
AssigneeSK hynix Inc.
InventorsKyu Nam Lim, Hong Sok Choi, Ki Myung Kyung, Mun Phil Park, Sun Hwa Park
Life of this patent
Estimating the term…
Abstract
A sense amplifier is configured to transfer data on a first data I/O line to a second data I/O line or to transfer data on the second data I/O line to the first data I/O line. The first data I/O line is substantially continuously coupled to the second data I/O line during an active operation.
Claims35
A sense amplifier configured to transfer data on first data I/O lines to second data I/O lines or to transfer data on the second data I/O lines to the first data I/O lines, wherein the first data I/O line is coupled to the second data I/O line continuously during an active operation.
A sense amplifier comprising:
- a data line connecting unit configured to couple first data I/O lines to second data I/O lines in response to an I/O switch signal;
- and
- a hybrid data transfer unit configured to amplify the first data I/O line in response to a sense amplifier enable signal.
A semiconductor apparatus comprising:
- a sense amplifier configured to transfer data between first and second data I/O lines in response to an I/O switch signal and a driving sense amplifier enable signal;
- and
- a precharge unit configured to precharge the first data I/O lines in response to a driving precharge signal,
- wherein the driving sense amplifier enable signal and the driving precharge signal are generated by one or more elements in a circuit area between a plurality of memory blocks.
A semiconductor apparatus comprising:
- first and second memory blocks to which a plurality of bit lines are assigned;
- a bit line sense amplifier configured to amplify the plurality of bit lines;
- first data I/O lines configured to be coupled to the plurality of bit lines;
- a sense amplifier configured to transfer data between the first data I/O lines and a second data I/O lines and to maintain an electrical connection of the first data I/O lines and the second data I/O lines substantially during an active operation;
- and
- a precharge unit configured to precharge the first data I/O line,
- wherein a sense amplifier enable signal to control the sense amplifier and a precharge signal to control the precharge unit are generated in a column decoder block.
A semiconductor apparatus comprising:
- a sense amplifier configured to transfer data between first data I/O lines and second data I/O lines;
- and
- a precharge unit configured to precharge the first data I/O lines and the second data I/O lines,
- wherein an electrical connection between the first data I/O lines and the second data I/O lines is maintained during an active operation.
A sense amplifier comprising a hybrid data transfer unit which differentially amplifies first data I/O lines in a read operation and a write operation,
- wherein the first data I/O lines are coupled to the second data I/O line continuously during an active operation.
A semiconductor apparatus having memory blocks having memory cells capable of storing data therein, wherein the stored data are accessible via bit lines, the semiconductor apparatus comprising:
- first data I/O lines connected to the bit lines;
- second data I/O lines;
- a sense amplifier capable of connecting the first data lines to the second data lines continuously during an active operation period.
Dependencies are inferred from the claim text.