Timing adjustment circuit, timing adjustment method, and correction value computing method
AssigneeFujitsu Semiconductor Limited
InventorHiroyuki Sano
Life of this patent
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Abstract
A timing adjustment circuit includes a determination unit for outputting delay information corresponding to a period of a first input signal, a storing unit for storing a plurality of correction values based on a circuit included in the determination unit, a correction unit for correcting the delay information based on a correction value selected from the plurality of the correction values, based on the delay information, and a first delay line for delaying a second input signal corresponding to the first input signal, based on the delay information corrected by the correction unit.
Claims10
A timing adjustment circuit comprising:
- a determination unit configured to output delay information corresponding to a period of a first input signal;
- a storing unit configured to store a plurality of correction values in accordance with a circuit included in the determination unit;
- a correction unit configured to correct the delay information based on a correction value selected from the plurality of the correction values, in accordance with the delay information;
- and
- a first delay line configured to delay a second input signal corresponding to the first input signal, in accordance with the delay information corrected by the correction unit,
- wherein the determination unit includes a second delay line and a wire coupled to the second delay line, and
- wherein the plurality of correction values are generated based on a difference between a first delay amount corresponding to the period of the first input signal and a second delay amount corresponding to the period of the first input signal, the first delay amount being measured based on a timing of the first input signal and a timing of a signal transmitted through the second delay line and the wire, and the second delay amount being measured based on the timing of the first input signal and a timing of a signal transmitted through the second delay line.
A timing adjustment method comprising:
- outputting delay information corresponding to a period of a first input signal;
- selecting a correction value in accordance with the delay information from a plurality of correction values stored in a storing unit;
- correcting the delay information based on the correction value in accordance with the delay information, thereby generating corrected delay information;
- and
- delaying a second input signal corresponding to the first input signal, in accordance with the corrected delay information;
- and
- generating the plurality of correlation values based on a difference between a first delay amount corresponding to the period of the first input signal and a second delay amount corresponding to the period of the first input signal, the first delay amount being measured based on a timing of the first input signal and a timing of a signal transmitted through a second delay line and a wire coupled to the second delay line, and the second delay amount being measured based on the timing of the first input signal and a timing of a signal transmitted through a second delay line.
A correction value computing method comprising:
- measuring a first delay amount corresponding to a period of a first input signal under each of a plurality of conditions for a second delay line, based on a timing of the first input signal and a timing of a signal transmitted through the second delay line and a wire coupled to the second delay line;
- measuring a second delay amount corresponding to the period of the first input signal under each of the plurality of the conditions, based on the timing of the first input signal and a timing of a signal transmitted through the second delay line;
- and
- computing a plurality of correction values corresponding to the first input signal based on a difference between the first delay amount and the second delay amount.
Dependencies are inferred from the claim text.