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US 8,300,471 B2Granted
Non-volatile semiconductor memory having multiple external power supplies
AssigneeMosaid Technologies Incorporated
InventorsJin-Ki Kim, Peter Gillingham
Life of this patent
Estimating the term…
Abstract
A memory device includes core memory such as flash memory for storing data. The memory device includes a first power input to receive a first voltage used to power the flash memory. Additionally, the memory device includes a second power input to receive a second voltage. The memory device includes power management circuitry configured to receive the second voltage and derive one or more internal voltages. The power management circuitry supplies or conveys the internal voltages to the flash memory. The different internal voltages generated by the power management circuitry (e.g., voltage converter circuit) and supplied to the core memory enable operations such as read/program/erase with respect to cells in the core memory.
Claims86
A memory device comprising:
- a core memory;
- a first input pin to receive a first voltage;
- a second input pin to receive a second voltage;
- voltage converter circuitry to convert the second voltage into more than one internal voltages, the more than one internal voltages being of sufficient magnitude to permit a number of selectively differing voltage applications to cells of the core memory to enable at least one operation in relation to data;
- and
- a device configuration register indicating that the voltage converter circuitry is configured to utilize the second voltage instead of the first voltage to produce the more than one internal voltages.
3 more elements
A memory devise comprising:
- a core memory;
- a first input pin to receive a first voltage;
- a second input pin to receive a second voltage;
- voltage converter circuitry to convert the second voltage into more than one internal voltages, the more than one internal voltages being of sufficient magnitude to permit a number of selectively differing voltage applications to cells of the core memory to enable at least one operation in relation to data;
- and
- a detector circuit to switch over from use of the second voltage to use of the first voltage to produce the more than one internal voltages in response to detecting that the second voltage is less than a threshold value.
3 more elements
A memory devise comprising:
- a core memory;
- a first input pin to receive a first voltage;
- a second input pin to receive a second voltage;
- voltage converter circuitry to convert the second voltage into more than one internal voltages, the more than one internal voltages being of sufficient magnitude to permit a number of selectively differing voltage applications to cells of the core memory to enable at least one operation in relation to data;
- and
- switch circuitry to select between inputting the first voltage and the second voltage into the voltage converter circuitry to generate the more than one internal voltages.
3 more elements
A method comprising:
- receiving a first voltage, the first voltage received from a first power source on a first input of a memory device;
- receiving a second voltage, the second voltage received from a second power source on a second input of the memory device;
- converting the second voltage into more than one voltages;
- selectively applying the more than one voltages to cells of a core memory to enable an at least one operation in relation to data;
- and
- switching over from use of the second voltage to use of the first voltage to produce the more than one voltages in response to detecting that the second voltages is less than a threshold value.
3 more elements
A method comprising:
- receiving a first voltage, the first voltage received from a first power source on a first of a memory device;
- receiving a second voltage, the second voltage received from a second power source on a second input of the memory device;
- converting the second voltage into more than one voltages;
- selectively applying the more than one voltages to cells of a core memory to enable an at least one operation in relation to data;
- and
- selecting between input of the first voltage and the second voltage into voltage converter circuitry to generate the more than one voltages.
3 more elements
A memory device comprising:
- a core memory including cells to store data;
- a first input pin to receive a first voltage signal;
- a second input pin to receive a second voltage signal;
- voltage converter circuitry to convert the second voltage signal into multiple internal voltage signals of different voltage magnitudes, the multiple internal voltage signals selectively applied to the cells of the core memory to support an at least one data access operation;
- and
- a device configuration register indicating that the voltage converter circuitry is configured to utilize the second voltage signal instead of the first voltage signal to produce the multiple internal voltage signals.
3 more elements
A memory devise comprising:
- a core memory including cells to store data;
- a first input pin to receive a first voltage signal;
- a second input pin to receive a second voltage signal;
- voltage converter circuitry to convert the second voltage signal into multiple internal voltages signals of different voltage magnitudes, the multiple internal voltages signals selectively applied to the cells of the core memory to support an at least one data access operation;
- and
- a detector circuit to switch over from use of the second voltage signal to use of the first voltage signal to produce the multiple internal voltage signals in response to detecting that a voltage magnitude of the second voltage signal is less than a threshold value.
3 more elements
Dependencies are inferred from the claim text.