Inverter circuit and display

An inverter circuit comprising:

• a first transistor, a second transistor and a third transistor each having channels of same conduction type;
• a first capacity element and a second capacity element;
• and
• an input terminal and an output terminal,
• wherein a gate of the first transistor is electrically connected to the input terminal, one terminal of a drain and a source of the first transistor is electrically connected to a first voltage line, and the other terminal of the first transistor is electrically connected to the output terminal,
• one terminal of a drain and a source of the second transistor is electrically connected to a second voltage line, and the other terminal of the second transistor is electrically connected to the output terminal,
• a gate of the third transistor is electrically connected to the input terminal, one terminal of a drain and a source of the third transistor is electrically connected to a third voltage line, and the other terminal of the third transistor is electrically connected to a gate of the second transistor,
• the first capacity element and the second capacity element are inserted in series between the input terminal and the gate of the second transistor, and
• an electrical connection point between the first capacity element and the second capacity element is electrically connected to the output terminal.

An inverter circuit comprising:

• a first transistor, a second transistor and a third transistor each having channels of same conduction type;
• an input terminal and an output terminal;
• and
• a control element including a first terminal electrically connected to the input terminal, a second terminal electrically connected to the output terminal, and a third terminal electrically connected to a gate of the second transistor, and allowing a voltage transient of the second terminal to be slower than a voltage transient of the third terminal when a falling-edge voltage or a rising-edge voltage is applied to the first terminal,
• wherein the first transistor makes or breaks electrical connection between the output terminal and a first voltage line in response to a potential difference between a voltage of the input terminal and a voltage of the first voltage line or a potential difference corresponding thereto,
• the second transistor makes or breaks electrical connection between a second voltage line and the output terminal in response to a potential difference between a gate voltage of the second transistor and a voltage of the output terminal or a potential difference corresponding thereto, and
• the third transistor makes or breaks electrical connection between a gate of the second transistor and a third voltage line in response to a potential difference between the voltage of the input terminal and a voltage of the third voltage line or a potential difference corresponding thereto.

An inverter circuit comprising:

• a first transistor, a second transistor and a third transistor each having channels of same conduction type;
• an input terminal and an output terminal;
• and
• a control element including a first terminal electrically connected to the input terminal, a second terminal electrically connected to the output terminal, and a third terminal electrically connected to a gate of the second transistor, and allowing a voltage transient of the second terminal to be slower than a voltage transient of the third terminal when a falling-edge voltage or a rising-edge voltage is applied to the first terminal,
• wherein a gate of the first transistor is electrically connected to the input terminal, one terminal of a drain and a source of the first transistor is electrically connected to a first voltage line, and the other terminal of the first transistor is electrically connected to the output terminal,
• one terminal of a drain and a source of the second transistor is electrically connected to a second voltage line, and the other terminal of the second transistor is electrically connected to the output terminal, and
• a gate of the third transistor is electrically connected to the input terminal, one terminal of a drain and a source of the third transistor is electrically connected to a third voltage line, and the other terminal of the third transistor is electrically connected to a gate of the second transistor.

A display with a display section and a drive section, the display section including a plurality of scanning lines arranged in rows, a plurality of signal lines arranged in columns, and a plurality of pixels arranged in a matrix form, the drive section including a plurality of inverter circuits each arranged corresponding to the scanning lines to drive each of the pixels, each of the inverter circuits comprising:

• a first transistor, a second transistor and a third transistor each having channels of same conduction type;
• a first capacity element and a second capacity element;
• and
• an input terminal and an output terminal,
• wherein a gate of the first transistor is electrically connected to the input terminal, one terminal of a drain and a source of the first transistor is electrically connected to a first voltage line, and the other terminal of the first transistor is electrically connected to the output terminal,
• one terminal of a drain and a source of the second transistor is electrically connected to a second voltage line, and the other terminal of the second transistor is electrically connected to the output terminal,
• a gate of the third transistor is electrically connected to the input terminal, one terminal of a drain and a source of the third transistor is electrically connected to a third voltage line, and the other terminal of the third transistor is electrically connected to a gate of the second transistor,
• the first capacity element and the second capacity element are inserted in series between the input terminal and the gate of the second transistor,
• an electrical connection point between the first capacity element and the second capacity element is electrically connected to the output terminal.

An inverter circuit comprising:

• a first transistor and a second transistor each having channels of same conduction type;
• and
• a first capacity element and a second capacity element,
• wherein the first transistor and the second transistor are connected in series between a first voltage line and a second voltage line,
• the first capacity element and the second capacity element are inserted in series between a gate of the first transistor and a gate of the second transistor,
• an electrical connection point between the first capacity element and the second capacity element is electrically connected to an output terminal,
• the second capacity element is inserted on a side close to the gate of the first transistor, and
• the capacity of the second capacity element is larger than that of the first capacity element.

An inverter circuit comprising:

• a first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor each having channels of same conduction type;
• a first capacity element and a second capacity element;
• and
• an input terminal and an output terminal,
• wherein the first transistor makes or breaks electrical connection between the output terminal and a first voltage line in response to a potential difference between a voltage of the input terminal and a voltage of the first voltage line or a potential difference corresponding thereto,
• the second transistor makes or breaks electrical connection between a second voltage line and the output terminal in response to a potential difference between a voltage of a first terminal which is one terminal of a source and a drain of the fifth transistor and a voltage of the output terminal or a potential difference corresponding thereto,
• the third transistor makes or breaks electrical connection between a gate of the fifth transistor and a third voltage line in response to a potential difference between the voltage of the input terminal and a voltage of the third voltage line or a potential difference corresponding thereto,
• the fourth transistor makes or breaks electrical connection between the first terminal and a fourth voltage line in response to a potential difference between the voltage of the input terminal and a voltage of the fourth voltage line or a potential difference corresponding thereto,
• the first capacity element and the second capacity element are inserted in series between the input terminal and the gate of the fifth transistor,
• an electrical connection point between the first capacity element and the second capacity element is electrically connected to the first terminal, and
• the fifth transistor makes or breaks electrical connection between a fifth voltage line and the first terminal in response to a voltage between terminals of the first capacity element or a voltage corresponding thereto.

An inverter circuit comprising:

• a first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor each having channels of same conduction type;
• a first capacity element and a second capacity element;
• and
• an input terminal and an output terminal,
• wherein a gate of the first transistor is electrically connected to the input terminal, one terminal of a drain and a source of the first transistor is electrically connected to a first voltage line, and the other terminal of the first transistor is electrically connected to the output terminal,
• one terminal of a drain and a source of the second transistor is electrically connected to a second voltage line, and the other terminal of the second transistor is electrically connected to the output terminal,
• a gate of the third transistor is electrically connected to the input terminal, one terminal of a drain and a source of the third transistor is electrically connected to a third voltage line, and the other terminal of the third transistor is electrically connected to a gate of the fifth transistor,
• a gate of the fourth transistor is electrically connected to the input terminal, one terminal of a drain and a source of the fourth transistor is electrically connected to a fourth voltage line, and the other terminal of the fourth transistor is electrically connected to a gate of the second transistor,
• one terminal of a drain and a source of the fifth transistor is electrically connected to a fifth voltage line, and the other terminal of the fifth transistor is electrically connected to the gate of the second transistor,
• the first capacity element and the second capacity element are inserted in series between the input terminal and the gate of the fifth transistor, and
• an electrical connection point between the first capacity element and the second capacity element is electrically connected to the gate of the second transistor.

An inverter circuit comprising:

• a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a seventh transistor each having channels of same conduction type;
• a first capacity element, a second capacity element and a third capacity element;
• and
• an input terminal and an output terminal,
• wherein the first transistor makes or breaks electrical connection between the output terminal and a first voltage line in response to a potential difference between a voltage of the input terminal and a voltage of the first voltage line or a potential difference corresponding thereto,
• the second transistor makes or breaks electrical connection between a second voltage line and the output terminal in response to a potential difference between a gate voltage of the second transistor and a voltage of the output terminal or a potential difference corresponding thereto,
• the third transistor makes or breaks electrical connection between a gate of the fifth transistor and a third voltage line in response to a potential difference between the voltage of the input terminal and a voltage of the third voltage line or a potential difference corresponding thereto,
• the fourth transistor makes or breaks electrical connection between a first terminal which is one terminal of a source and a drain of the fifth transistor and a fourth voltage line in response to a potential difference between the voltage of the input terminal and a voltage of the fourth voltage line or a potential difference corresponding thereto,
• the first capacity element and the second capacity element are inserted in series between the input terminal and the gate of the fifth transistor,
• an electrical connection point between the first capacity element and the second capacity element is electrically connected to the first terminal,
• the third capacity element is inserted between a gate of the second transistor and the output terminal,
• the fifth transistor makes or breaks electrical connection between a fifth voltage line and the first terminal in response to a voltage between terminals of the first capacity element or a voltage corresponding thereto,
• the sixth transistor makes or breaks electrical connection between the gate of the second transistor and a sixth voltage line in response to a potential difference between the voltage of the input terminal and a voltage of the sixth voltage line or a potential difference corresponding thereto, and
• the seventh transistor makes or breaks electrical connection between a seventh voltage line and the gate of the second transistor in response to a potential difference between the voltage of the first terminal and the gate voltage of the second transistor or a potential difference corresponding thereto.

An inverter circuit comprising:

• a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a seventh transistor each having channels of same conduction type;
• a first capacity element, a second capacity element and a third capacity element;
• and
• an input terminal and an output terminal,
• wherein a gate of the first transistor is electrically connected to the input terminal, one terminal of a drain and a source of the first transistor is electrically connected to a first voltage line, and the other terminal of the first transistor is electrically connected to the output terminal,
• one terminal of a drain and a source of the second transistor is electrically connected to a second voltage line, and the other terminal of the second transistor is electrically connected to the output terminal,
• a gate of the third transistor is electrically connected to the input terminal, one terminal of a drain and a source of the third transistor is electrically connected to a third voltage line, and the other terminal of the third transistor is electrically connected to a gate of the fifth transistor,
• a gate of the fourth transistor is electrically connected to the input terminal, one terminal of a drain and a source of the fourth transistor is electrically connected to a fourth voltage line, and the other terminal of the fourth transistor is electrically connected to a gate of the seventh transistor,
• one terminal of a drain and a source of the fifth transistor is electrically connected to a fifth voltage line, and the other terminal of the fifth transistor is electrically connected to the gate of the seventh transistor,
• a gate of the sixth transistor is electrically connected to the input terminal, one terminal of a drain and a source of the sixth transistor is electrically connected to a sixth voltage line, and the other terminal of the sixth transistor is connected to a gate of the second transistor,
• one terminal of a drain and a source of the seventh transistor is electrically connected to a seventh voltage line, and the other terminal of the seventh transistor is electrically connected to the gate of the second transistor,
• the first capacity element and the second capacity element are inserted in series between the input terminal and a gate of the fifth transistor,
• an electrical connection point between the first capacity element and the second capacity element is electrically connected to the gate of the seventh transistor, and
• the third capacity element is inserted between the gate of the second transistor and the output terminal.