Integrator-based common mode stabilization method applied to pseudo-differential switched-capacitor circuit

A pseudo-differential switched-capacitor circuit, comprising:

• a differential floating sampling (DFS) circuit that has a pseudo-differential architecture, the DFS circuit having a differential positive input and a negative input, and the DFS circuit comprising:
• a positive path including a first single-ended amplifier and a first capacitor, wherein the first capacitor is coupled between an input and a differential positive output of the first single-ended amplifier;
• and
• a negative path including a second single-ended amplifier and a second capacitor, wherein the second capacitor is coupled between an input and a differential negative output of the second single-ended amplifier;
• and
• an integrator sampling a common-mode voltage disturbance at the differential positive output and the differential negative output during a amplifying phase of the DFS circuit and controllably feeding an integrator output back to inputs of the first single-ended amplifier and the second single-ended amplifier of the DFS circuit during a sampling phase of the DFS circuit, thereby stabilizing an output common-mode level of the differential positive output and differential negative output of the DFS circuit at a desirable level.