Test apparatus and electronic device
AssigneeAdvantest Corporation
InventorsDaisuke Watanabe, Toshiyuki Okayasu
Life of this patent
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Abstract
Provided is a test apparatus that tests a device under test including an external interface circuit that transfers signals between an internal circuit inside a device and the outside of the device, the test apparatus comprising a pattern generating section that inputs, to the external interface circuit, a test pattern for testing the external interface circuit; an interface control section that causes the external interface circuit to loop back and output the test pattern; and an interface judging section that judges acceptability of the external interface circuit based on the test pattern looped back and output by the external interface circuit.
Claims14
A test apparatus configured to connect to, via an I/O pin, and test, via the I/O pin, a device under test that is external to the test apparatus and includes an external interface circuit that transfers signals between an internal circuit inside the device under test and the outside of the device under test, the test apparatus comprising:
- a pattern generating section that inputs, to the external interface circuit, a test pattern for testing the external interface circuit;
- an interface control section that causes the external interface circuit to loop back and output the test pattern;
- and
- an interface judging section that judges acceptability of the external interface circuit based on the test pattern looped back and output by the external interface circuit.
An electronic device comprising:
- an internal circuit;
- an external interface circuit that includes a plurality of I/O pins and that transfers signals between the internal circuit and the outside of the device;
- an internal interface circuit that is provided coupled between the internal circuit and the external interface circuit;
- and
- a switching section that switches whether each I/O pin is connected to the internal interface circuit or to another I/O pin, wherein
- when notification for testing of the external interface circuit is received from an external test apparatus, the switching section connects, within the external interface circuit, via a path not including the internal interface circuit and not including the internal circuit, (i) I/O pins, from among the plurality of I/O pins, that receive a test pattern from the test apparatus to be connected to (ii) I/O pins, from among the plurality of I/O pins, that loop back and output the test pattern to the test apparatus.
Dependencies are inferred from the claim text.