Integrated circuit packaging system with bump conductors and method of manufacture thereof
AssigneeSTATS ChipPAC, Ltd.
InventorsRui Huang, Seng Guan Chow, Heap Hoe Kuan
Life of this patent
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Abstract
A method of manufacture of an integrated circuit packaging system includes: providing a base substrate having a component side; mounting a base device having a base circuit connector directly on the component side; attaching conformal interconnects, having the same pre-deformation height from the component side, directly on the component side and offset from the base device; and attaching a stack substrate having stack interconnects directly on the conformal interconnects, portions of the stack interconnects covered by the conformal interconnects having different deformation heights from the component side.
Claims20
A method of manufacture of an integrated circuit packaging system comprising:
- providing a base substrate having a component side;
- mounting a base device having a base circuit connector directly on the component side;
- attaching conformal interconnects, having the same pre-deformation height from the component side, directly on the component side and offset from the base device;
- and
- attaching a stack substrate having stack interconnects directly on the conformal interconnects, portions of the stack interconnects covered by the conformal interconnects having different deformation heights from the component side including forming an electrical connection between the stack interconnects and the conformal interconnects by thermal compression having a temperature below reflow.
A method of manufacture of an integrated circuit packaging system comprising:
- providing a base substrate having a component side;
- mounting a base device having a base circuit connector directly on the component side;
- attaching conformal interconnects, having the same pre-deformation height from the component side, directly on the component side and offset from the base device;
- and
- attaching a stack substrate having a stack side with stack interconnects directly on the conformal interconnects, portions of the stack interconnects covered by the conformal interconnects having different deformation heights from the component side including forming an electrical connection between the stack interconnects and the conformal interconnects by thermal compression having a temperature below reflow.
An integrated circuit packaging system comprising:
- a base substrate having a component side;
- a base device having a base circuit connector mounted directly on the component side;
- conformal interconnects attached directly on the component side and offset from the base device;
- and
- a stack substrate having stack interconnects directly on the conformal interconnects, portions of the stack interconnects covered by the conformal interconnects having different deformation heights from the component side, with an electrical connection between the stack interconnects and the conformal interconnects formed by thermal compression having a temperature below reflow.
Dependencies are inferred from the claim text.