Integrated circuit package system with package stacking and method of manufacture thereof
AssigneeSTATS ChipPAC, Ltd.
InventorsIn Sang Yoon, SeongMin Lee, SangJin Lee
Life of this patent
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AssigneeSTATS ChipPAC, Ltd.
InventorsIn Sang Yoon, SeongMin Lee, SangJin Lee
Estimating the term…
A method of manufacture of an integrated circuit package system includes: forming a base package including: fabricating a base package substrate having a component side and a system side, coupling a first integrated circuit die to the component side, and coupling stacking interconnects to the component side to surround the first integrated circuit die; forming a stacked integrated circuit package including: fabricating a stacked package substrate having a chip side, coupling a lower stacked integrated circuit die to the chip side, and attaching on a coupling side, of the stacked package substrate, the stacking interconnects; stacking the stacked integrated circuit package on the base package including the stacking interconnects of the stacked integrated circuit package on the stacking interconnects of the base package; and forming a stacked solder column by reflowing the stacked interconnects.
A method of manufacture of an integrated circuit package system comprising:
A method of manufacture of an integrated circuit package system comprising:
An integrated circuit package system comprising:
Dependencies are inferred from the claim text.