Semiconductor die with backside passive device integration
AssigneeSkyworks Solutions, Inc.
InventorRuss Reisner
Life of this patent
Estimating the term…
Abstract
According to an exemplary embodiment, a semiconductor die includes a backside surface opposite an active surface. The active surface includes at least one active device. The semiconductor die includes at least one passive device situated on the backside surface. The semiconductor die further includes an interconnect region situated over the active surface. The semiconductor die further includes at least one through-wafer via, where the at least one through-wafer via electrically connects the at least one passive device to the interconnect region. The interconnect region can include a number of solder bump pads or a number of bond pads.
Claims18
A semiconductor die comprising:
- a substrate including a backside surface opposite an active surface, the backside surface including at least one passive device and at least one input/output (I/O) pad electrically coupled to the at least one passive device, the active surface of the substrate including at least one active device;
- a metallization layer formed over the backside surface, the metallization layer substantially surrounding and separate from the at least one passive device;
- and
- an interconnect region adjacent to and surrounding the active surface and opposed to the backside surface such that the active surface of the substrate underlies the interconnect region and is between the backside surface and the interconnect region.
A semiconductor die comprising:
- a substrate including a backside surface opposite an active surface, the backside surface including at least one passive device, the active surface including at least one active device;
- a metallization layer formed over the backside surface, the metallization layer adjacent to and separate from the at least one passive device on the backside surface;
- an interconnect region situated adjacent and surrounding the active surface and opposed to the backside surface such that the active surface underlies the interconnect region and is between the backside surface and the interconnect region;
- and
- at least one input/output (I/O) pad situated on the backside surface, the at least one I/O pad electrically connecting to the interconnect region of the semiconductor die.
A semiconductor die comprising:
- a backside surface opposite an active surface, the backside surface including an inductor patterned on the backside surface, said active surface including an active portion of a bulk acoustic wave (BAW) filter, the inductor forming at least a part of a balun of the BAW filter;
- an interconnect region situated adjacent and surrounding said active surface and opposed to the backside surface such that the active surface underlies the interconnect region and is between the backside surface and the interconnect region;
- a metallization layer situated over the backside surface, the metallization layer substantially surrounding and separate from the inductor;
- and
- at least one through-wafer via electrically connecting the inductor to the interconnect region.
Dependencies are inferred from the claim text.