Silicon germanium heterojunction bipolar transistor having interstitial trapping layer in base region
AssigneeInternational Business Machines Corporation
InventorsWade J. Hodge, Alvin J. Joseph, Rajendran Krishnasamy, Qizhi Liu, Bradley A. Orner
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Abstract
A heterojunction bipolar transistor (HBT), an integrated circuit (IC) chip including at least one HBT and a method of forming the IC. The HBT includes an extrinsic base with one or more buried interstitial barrier layer. The extrinsic base may be heavily doped with boron and each buried interstitial barrier layer is doped with a dopant containing carbon, e.g., carbon or SiGe:C. The surface of the extrinsic base may be silicided.
Claims20
A heterojunction bipolar transistor (HBT) comprising:
- a semiconductor substrate including a collector region;
- an intrinsic base region formed on said collector region;
- an emitter region;
- and
- an extrinsic base region connected to said intrinsic base and formed on said substrate, said extrinsic base region comprising:
- a semiconductor material layer;
- and
- a layer of an interstitial trapping material buried within said semiconductor material layer,
- wherein said semiconductor material layer directly contacts the uppermost surface of said interstitial trapping material and
- the lowermost surface of said interstitial trapping material directly contacts said semiconductor layer.
An integrated circuit (IC) chip including at least one heterojunction bipolar transistor (HBT), said HBT comprising:
- a collector at a surface of a semiconductor material layer;
- an intrinsic base region formed on said surface above said collector;
- an emitter disposed above said intrinsic base;
- a doped extrinsic base connected to said intrinsic base;
- and
- an interstitial barrier buried in said doped extrinsic base,
- wherein said extrinsic base directly contacts the uppermost surface of said interstitial barrier and
- the lowermost surface of said interstitial barrier directly contacts said extrinsic base.
A heterojunction bipolar transistor (HBT) comprising:
- a semiconductor substrate including a collector region;
- shallow trench isolation (STI) regions in a surface of said semiconductor substrate defining an HBT collector;
- an intrinsic base on said HBT collector;
- an emitter on said intrinsic base;
- and
- an extrinsic base on said surface and connected to said intrinsic base, said extrinsic base comprising:
- a semiconductor material layer doped with a dopant to a solid solubility limit of said dopant in said semiconductor material;
- a layer of an interstitial trapping material buried within said semiconductor material layer,
- wherein said semiconductor material layer directly contacts the uppermost surface of said interstitial trapping material and
- the lowermost surface of said interstitial trapping material directly contacts said semiconductor layer;
- and
- a silicide layer on said semiconductor material layer.
Dependencies are inferred from the claim text.