Capping of copper interconnect lines in integrated circuit devices

A method for capping lines, the method comprising:

• depositing a metal film layer having a thickness on a copper line, the copper line disposed in a dielectric substrate, wherein the depositing results in the deposition of stray metal material on the surface of the dielectric substrate;
• and
• etching with an anisotropic etching process to remove a portion of the metal film layer and the stray metal material on the surface of the dielectric substrate;
• wherein the metal film layer is deposited at an initial thickness sufficient to leave a metal film layer cap remaining on the copper line following the removal of the stray metal material.

A method for capping lines, the method comprising:

• forming a metal film layer on a copper line by a selective deposition process, the copper line disposed in a dielectric substrate, wherein the depositing also results in the deposition of stray metal material on and in contact with the surface of the dielectric substrate;
• and
• etching with an etching process to remove a portion of the metal film layer and the stray metal material from the surface of the dielectric substrate;
• wherein the metal film layer is deposited at an initial thickness sufficient to leave a metal film layer cap remaining on the copper line following the removal of the stray metal material.