Structure and method of forming enhanced array device isolation for implanted plate eDRAM

A method for forming a memory device comprising:

• forming a semiconductor on insulator (SOI) substrate by bonding, the SOI substrate including a first semiconductor layer in direct contact with a first horizontal surface of a buried dielectric layer of a first thickness, and a second semiconductor layer in direct contact with a second horizontal surface of the buried dielectric, wherein said first horizontal surface is opposite said second horizontal surface and wherein a bonded interface is present between at least one of the buried dielectric layer and the first semiconductor layer and the buried dielectric layer and the second semiconductor layer;
• forming a pad dielectric stack on a surface of the first semiconductor layer that is opposing the surface of the first semiconductor layer that is in direct contact with the first horizontal surface of the buried dielectric layer, wherein the pad dielectric stack includes an opening exposing a portion the surface of the first semiconductor layer;
• etching the portion of the surface of the first semiconductor layer exposed by the opening in the pad dielectric stack through the buried dielectric layer terminating on an uppermost surface of the second semiconductor layer;
• annealing in an oxidizing ambient to form a thermal oxide at the bonded interface of the SOI substrate, wherein said thermal oxide is located on one of said first and second horizontal surfaces and increases the first thickness of said buried dielectric layer to a second thickness;
• forming a trench in the second semiconductor layer extending from the opening in the pad dielectric stack;
• and
• forming a capacitor within the trench.