# US 8,289,971 B2 · Data transmission method

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- Number: US 8,289,971 B2
- Document ID: US8289971B2
- Status: Granted
- Kind: B2
- Application number: 12/094,901
- Filed: 2006-11-21
- Published: 2008-10-30
- Granted: 2012-10-16
- Earliest claimed: 2005-11-26
- Assignees: Cogniscience Limited
- Inventors: Stephen Byram Furber
- Web page: https://patentgrep.com/patent/US8289971B2

## CPC

- H04L 45/16: Multipoint routing
- H04L 12/18: for broadcast or conference {, e.g. multicast}
- H04L 45/06: {Deflection routing, e.g. hot-potato routing}
- H04L 45/54: {Organization of routing tables}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

A method of transmitting data between a plurality of inter-connected elements. The method comprises receiving a message from a first element, said message comprising a routing key plus optionally a data payload. The routing key is processed to identify a plurality of said inter-connected elements, and data is transmitted to said identified plurality of inter-connected elements.

## Claims

### Claim 1

A method of transmitting a message between a plurality of inter-connected elements, the method comprising:
receiving said message from a first element, said message comprising only a routing key;
processing said routing key to identify an identified plurality of said plurality of inter-connected elements, the plurality of interconnected elements being configured to implement a plurality of neurons that form part of a neural network; and
transmitting said message to said identified plurality of said plurality of inter-connected elements;
wherein processing said routing key comprises attempting to locate a routing word by performing a look up operation using said routing key, and said look up operation comprises comparing said routing key with a plurality of keys associated with respective routing words, the routing key comprising a plurality of bits, and only a subset of said plurality of bits being used in at least some of said comparisons, said plurality of bits to be used for a comparison being determined for each key from said plurality of keys based upon a respective mask associated with that key, the identified plurality of said plurality of inter-connected elements being identified using said located routing word, wherein said routing word has a bit for each of the identified plurality of said plurality of inter-connected elements connected to a particular one of said plurality of inter-connected elements.

### Claim 2 (depends on 1)

The method according to claim 1, wherein said subset of said plurality of bits is determined for each key from said plurality of keys independently.

### Claim 3 (depends on 1)

The method according to claim 1, wherein selecting said subset of said plurality of bits comprises setting bits of said routing key other than said subset of said plurality of bits to a predetermined state, before performing said comparisons.

### Claim 4 (depends on 3)

The method according to claim 3, wherein setting bits of said routing key comprises performing a bit-wise logical AND operation between said routing key and a predetermined mask.

### Claim 5 (depends on 1)

The method according to claim 1, wherein said routing key comprises an identifier of said first element.

### Claim 6 (depends on 1)

The method according to claim 1, further comprising identifying at least one interconnected element from said plurality of inter-connected elements using default data when said attempting is unsuccessful.

### Claim 7 (depends on 1)

The method according to claim 1, wherein said first element and said identified plurality of said plurality of inter-connected elements are connected to a second element, and said method is carried out at said second element.

### Claim 8 (depends on 1)

A tangible carrier medium carrying computer readable program code configured to cause a computer to carry out a method according to claim 1.

### Claim 9 (depends on 1)

A computer apparatus comprising:
a program memory storing processor readable instructions; and
a processor configured to read and execute instructions stored in said program memory;
wherein said processor readable instructions comprise instructions controlling the processor to carry out a method according claim 1.

### Claim 10

An apparatus for transmitting data between a plurality of inter-connected elements, the apparatus comprising:
a receiver interface configured to receive a message from a first element, said message comprising only a routing key;
a processor configured to identify an identified plurality of said plurality of inter-connected elements by attempting to locate a routing word by performing a look up operation using said routing key, said plurality of inter-connected elements being configured to implement a plurality of neurons that form part of a neural network, the look up operation comprising comparing said routing key with a plurality of keys associated with respective routing words, the routing key comprising a plurality of bits, and only a subset of said plurality of bits being used in at least some of said comparisons, said plurality of bits to be used for a comparison being determined for each key from said plurality of keys based upon a respective mask associated with that key, the identified plurality of said plurality of inter-connected elements being identified using said routing word, wherein said routing word has a bit for each of the identified plurality of said plurality of inter-connected elements connected to a particular one of said plurality of inter-connected elements; and
a transmitter interface configured to transmit only said routing key to said identified plurality of said plurality of inter-connected elements.

### Claim 11 (depends on 10)

The apparatus according to claim 10, wherein said processor is configured to identify said identified plurality of said plurality of inter-connected elements on the basis of data stored in an associative memory.

### Claim 12 (depends on 11)

The apparatus according to claim 11, wherein said associative memory is configured to locate a routing word stored in associated RAM.

### Claim 13 (depends on 10)

The apparatus according to claim 10 wherein said associative memory comprises a plurality of entries, each entry from said plurality of entries comprising a key from said plurality of keys, and said processor is configured to identify said identified plurality of said plurality of inter-connected elements using said plurality of keys.

### Claim 14 (depends on 13)

The apparatus according to claim 13, wherein each entry of said associative memory further comprises a mask, and said routing key is combined with said mask to identify said identified plurality of said plurality of inter-connected elements.

### Claim 15

A network of inter-connected elements, the elements being configured to transmit data between one another, each element comprising a router, the router being configured to:
receive a message from a first element, said message comprising a routing key;
process said routing key to identify a plurality of said inter-connected elements by attempting to locate a routing word by performing a look up operation using said routing key, the plurality of said inter-connected elements configured to implement a plurality of neurons that form part of a neural network, the look up operation comprising comparing said routing key with a plurality of keys associated with respective routing words, the routing key comprising a plurality of bits, and only a subset of said plurality of bits being used in at least some of said comparisons, the bits of the routing key to be used for a comparison being determined for each key based upon a respective masks associated with the key, said plurality of bits to be used for a comparison being determined for each key from the plurality of keys based upon a respective mask associated with that key, the identified plurality of said plurality of inter-connected elements being identified using said routing word, wherein said routing word has a bit for each of the identified plurality of inter-connected elements connected to a particular one of said plurality of inter-connected elements; and
transmit data to said identified plurality of said plurality of inter-connected elements.
