Method and apparatus to use physical design information to detect IR drop prone test patterns
AssigneeCadence Design Systems, Inc.
InventorsSenthil Arasu Thirunavukarasu, Shaleen Bhabu, Vivek Chickermane
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Abstract
A method is provided to evaluate whether one or more test patterns is power safe for use during manufacturing testing of an integrated circuit that includes a nonuniform power grid and that includes a scan chain, the method comprising: assigning respective toggle count thresholds for respective power grid regions of the non-uniform power grid; and determining whether respective numbers of toggles by scan elements of the scan chain within one or more respective power grid regions meet respective toggle count thresholds for the one or more respective regions during at least one scan-shift cycle in the course of scan-in of a test pattern to the scan chain.
Claims16
A method to identify clock cycles that involve switching activity levels that are more likely to result in IR drops that utilize detailed IR drop analysis, wherein the design includes a nonuniform power grid that includes a first power grid region having first physical characteristics and having a second power grid region having a second physical characteristics, the method comprising:
- using a computer system to run a simulation model of the integrated circuit to simulate scan mode operation of a circuit design during multiple clock cycles;
- capturing value changes of sequential logic in the course of the multiple cycles;
- obtaining respective value change count thresholds for respective power grid regions of the non-uniform power grid based at least in part upon the physical characteristics of the respective power grid regions;
- and
- determining clock cycles during scan mode operation during which respective numbers of value changes per clock cycle within one or more respective power grid regions meet respective value change thresholds for the one or more respective regions.
A system to identify clock cycles that involve switching activity levels that are more likely to result in IR drops that utilize detailed IR drop analysis, wherein the design includes a nonuniform power grid that includes a first power grid region having first physical characteristics and having a second power grid region having a second physical characteristics, wherein the system includes a processor, a communication bus and a non-transitory machine readable storage device encoded with program code to configure the processor to perform a process comprising:
- using a simulation model of the integrated circuit to simulate scan mode operation of a circuit design during multiple clock cycles;
- capturing value changes of sequential logic in the course of the multiple cycles;
- obtaining respective value change count thresholds for respective power grid regions of the non-uniform power grid based at least in part upon the physical characteristics of the respective power grid regions;
- and
- determining clock cycles during which respective numbers of value changes per clock cycle within one or more respective power grid regions meet respective value change thresholds for the one or more respective regions.
An article of manufacture that includes a non-transitory computer readable storage device that stores code to configure a processor to perform a method to identify clock cycles that involve switching activity levels that are more likely to result in IR drops that utilize detailed IR drop analysis, wherein the design includes a nonuniform power grid that includes a first power grid region having first physical characteristics and having a second power grid region having a second physical characteristics, wherein the system includes a processor, a communication bus and a non-transitory machine readable storage device encoded with program code to configure the processor to perform a process comprising:
- using a simulation model of the integrated circuit to simulate scan mode operation of a circuit design during multiple clock cycles;
- capturing value changes of sequential logic in the course of the multiple cycles;
- obtaining respective value change count thresholds for respective power grid regions of the non-uniform power grid based at least in part upon the physical characteristics of the respective power grid regions;
- and
- determining clock cycles during scan mode operation during which respective numbers of value changes per clock cycle within one or more respective power grid regions meet respective value change thresholds for the one or more respective regions.
A system to identify clock cycles that involve switching activity levels that are more likely to result in IR drops that utilize detailed IR drop analysis, wherein the design includes a nonuniform power grid that includes a first power grid region having first physical characteristics and having a second power grid region having a second physical characteristics, the system comprising:
- means for using a simulation model of the integrated circuit to simulate scan mode operation of a circuit design during multiple clock cycles;
- means for capturing value changes of sequential logic in the course of the multiple cycles;
- means for obtaining respective value change count thresholds for respective power grid regions of the non-uniform power grid based at least in part upon the physical characteristics of the respective power grid regions;
- and
- means for determining clock cycles during scan mode operation during which respective numbers of value changes per clock cycle within one or more respective power grid regions meet respective value change thresholds for the one or more respective regions.
Dependencies are inferred from the claim text.