Method and apparatus for performing incremental delay annotation

A non-transitory computer readable medium including a sequence of instructions stored thereon for causing a computer to execute a method comprising:

• identifying components and routing connections associated with design changes made to a system design by comparing a first netlist reflecting the placement and routing of the system design with a second netlist reflecting the placement and routing of a modified system design;
• computing new information to annotate delays for the components and routing connections identified;
• and
• utilizing delays previously computed for components and routing connections that have not been impacted by the design changes to annotate delays for the components and the routing connections that have not been impacted by the design changes.

A system comprising:

• a synthesis unit operable to generate a design for a system;
• a mapping unit operable to implement the design with components available on a target device;
• a placement unit operable to determine components on the target device to assign to the system;
• a routing unit operable to determine routing resources on the target device to assign to connect the components;
• and
• a delay annotation unit operable to identify components and routing connections associated with system design changes based on parasitic capacitance loading, and operable to compute new information used for annotating delays for the components and routing connections identified while utilizing delays previously computed for components and routing connections that have not been impacted by the design changes to annotate delays for the components and the routing connections that have not been impacted by the design changes.