Device and method for testing a circuit
AssigneeFreescale Semiconductor, Inc.
InventorsGal Malach, Nir Blinky, Lior Moheban
Life of this patent
Estimating the term…
Abstract
A device having testing capabilities, the device includes: a tested circuit that includes multiple scan chains; a compactor adapted to compress scan chain test responses; a mask unit, connected between the multiple scan chains and the compactor, wherein the mask unit is adapted to mask scan chain test responses outputted by the multiple scan chains during a masking period; and an mask prevention unit, adapted to prevent masking of scan chain test responses during a mask prevention period that at least partially overlaps a mask unit configuration period.
Claims20
A device having testing capabilities, the device comprises:
- a tested circuit that comprises multiple scan chains;
- a compactor adapted to compress scan chain test responses;
- a mask unit, coupled between the multiple scan chains and the compactor, wherein the mask unit is adapted to mask scan chain test responses outputted by the multiple scan chains during a masking period;
- and
- a mask prevention unit, adapted to prevent masking of scan chain test responses during a mask prevention period that at least partially overlaps a mask unit configuration period.
A device having testing capabilities, the device comprises:
- a tested circuit that comprises multiple scan chains;
- a compactor adapted to compress scan chain test responses;
- a mask unit, coupled between the multiple scan chains and the compactor, wherein the mask unit comprises a first mask and a second mask and wherein the first mask and second mask jointly mask scan chain test responses, wherein the first mask is re-configured at a rate that is higher than a re-configuration rate of the second mask.
A method for testing a circuit, the method comprises:
- masking, by a mask unit, at least one masking period scan chain test response outputted by at least one scan chain during a masking period;
- preventing masking of mask prevention period scan chain test responses during a mask prevention period that at least partially overlaps a mask unit configuration period;
- and compressing unmasked scan chain test responses outputted from multiple scan chains during at least the masking period.
A method for testing a circuit, the method comprises:
- compressing scan chain test responses outputted from multiple scan chains during a masking period;
- masking, by a mask unit that comprises a first mask circuit and a second mask circuit, at least one scan chain test response outputted by at least one scan chain during a masking period;
- and
- configuring the first mask circuit and the second mask circuit, wherein the first mask is re-configured at a rate that is higher than a re-configuration rate of the second mask.
Dependencies are inferred from the claim text.