Reducing broadcasts in multiprocessors
AssigneeInternational Business Machines Corporation
InventorsKhubaib Khubaib, Moinuddin Khalil Ahmed Qureshi, Vijayalakshmi Srinivasan
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Abstract
Disclosed is an apparatus to reduce broadcasts in multiprocessors including a plurality of processors; a plurality of memory caches associated with the processors; a plurality of translation lookaside buffers (TLBs) associated with the processors; and a physical memory shared with the processors memory caches and TLBs; wherein each TLB includes a plurality of entries for translation of a page of addresses from virtual memory to physical memory, each TLB entry having page characterization information indicating whether the page is private to one processor or shared with more than one processor. Also disclosed is a computer program product and method to reduce broadcasts in multiprocessors.
Claims19
An apparatus to reduce broadcasts in multiprocessors comprising:
- a plurality of processors;
- a plurality of memory caches associated with the processors;
- a plurality of translation lookaside buffers (TLBs) associated with the processors;
- and
- a physical memory shared with the processors, memory caches and TLBs;
- wherein each TLB comprises a plurality of entries for translation of a page of addresses from virtual memory to physical memory, each TLB entry having a field indicating a virtual page number with each page being a block of contiguous virtual memory addresses and each entry having page characterization information indicating whether the page is private to one processor or shared with more than one processor, wherein the page characterization information comprises each TLB entry having a one bit field indicating whether the page is private or shared, and
- wherein the page characterization information comprises each TLB entry having a field indicating the processor identification (ID) of the processor owning the page.
An apparatus to reduce broadcasts in multiprocessors comprising:
- a cluster comprising:
- a plurality of processors;
- a plurality of memory caches associated with the processors with there being at least one memory cache for each processor;
- a plurality of translation lookaside buffers (TLBs) associated with the processors with there being at least one TLB for each processor;
- and
- a physical memory shared with the processors, memory caches and TLBs;
- wherein each TLB comprises a plurality of entries for translation of a page of addresses from virtual memory to physical memory, each TLB entry having a field indicating a virtual page number with each page being a block of contiguous virtual memory addresses and each entry having page characterization information indicating whether the page is private to one processor or shared with more than one processor, wherein
- the page characterization information comprises each TLB entry having a one bit field indicating whether the page is private or shared, and
- wherein the page characterization information comprises each TLB entry having a field indicating the processor identification ID of the processor owning the page.
A method to reduce broadcasts in multiprocessors comprising a plurality of processors;
- a plurality of memory caches associated with the processors;
- a plurality of translation lookaside buffers (TLBs) associated with the processors and comprising a plurality of entries for translation of a page of addresses from virtual memory to physical memory, each TLB entry having a field indicating a virtual page number with each page being a block of contiguous virtual memory addresses;
- and a physical memory shared with the processors, memory caches and TLBs, the method comprising the steps of:
- processing a memory request from a processor;
- performing a lookup in at least one TLB for virtual to physical address translation;
- reading page characterization information from a TLB entry indicating whether the page is private to one processor or shared with more than one processor, wherein the page characterization information comprises each TLB entry having a one bit field indicating whether the page is private or shared, and wherein the page characterization information comprises each TLB entry having a field indicating the processor identification (ID) of the processor owning the page;
- and
- performing a snoop request only if the one bit field in the page characterization information indicates the page is shared with more than one processor.
A computer program product for reducing broadcasts in multiprocessors comprising a plurality of processors;
- a plurality of memory caches associated with the processors;
- a plurality of translation lookaside buffers (TLBs) associated with the processors and comprising a plurality of entries for translation of a page of addresses from virtual memory to physical memory, each TLB entry having a field indicating a virtual page number with each page being a block of contiguous virtual memory addresses;
- and a physical memory shared with the processors, memory caches and TLBs and comprising:
- a computer readable non-transitory storage medium having computer readable program code embodied therewith, the computer readable program code comprising:
- computer readable program code configured to process a memory request from a processor;
- computer readable program code configured to perform a lookup in at least one TLB for virtual to physical address translation;
- computer readable program code configured to read page characterization information from a TLB entry indicating whether the page is private to one processor or shared with more than one processor, wherein the page characterization information comprises each TLB entry having a one bit field indicating whether the page is private or shared, and wherein the page characterization information comprises each TLB entry having a field indicating the processor identification (ID) of the processor owning the page;
- and
- computer readable program code configured to perform a snoop request only if the one bit field in the page characterization information indicates the page is shared with more than one processor.
Dependencies are inferred from the claim text.