US 8,285,950 B2 · SMT/ECO mode based on cache miss rate

Abstract

A computer implemented method for managing an execution mode for a parallel processor is provided. A monitor identifies a first efficiency rate for a first contested resource of the parallel processor operating in a first operating mode. Responsive to identifying the first efficiency rate for the first contested resource, the monitor identifies whether the first efficiency rate for the contested resource of the parallel processor operating in the first operating mode exceeds a threshold. Responsive to identifying that the efficiency rate for the contested resource exceeds the threshold, an operation of the parallel processor is changed to a second operating mode.

Claims14

Dependent claims

A computer-readable medium having a computer program product encoded thereon for managing an execution mode for a parallel processor, the computer program product comprising:

instructions for identifying a first efficiency rate for a first contested resource of the parallel processor operating in a first operating mode;
instructions, responsive to identifying the first efficiency rate for the first contested resource, for identifying whether the first efficiency rate for the contested resource of the parallel processor operating in the first operating mode exceeds a threshold;
and
instructions, responsive to identifying that the efficiency rate for the contested resource exceeds the threshold, for changing an operation of the parallel processor to a second operating mode.

1 more element

A data processing system comprising:

a storage having a computer program product encoded thereon for managing an execution mode for a parallel processor;
a bus connecting the storage to a processor;
and
a processor, wherein the processor executes the computer program product:
to identify a first efficiency rate for a first contested resource of the parallel processor operating in a first operating mode;
responsive to identifying the first efficiency rate for the first contested resource, to identify whether the first efficiency rate for the contested resource of the parallel processor operating in the first operating mode exceeds a threshold;
and responsive to identifying that the efficiency rate for the contested resource exceeds the threshold, to change an operation of the parallel processor to a second operating mode.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application

12/792,850Filed 3 Jun 2010

Published

US 2011/0302372 A18 Dec 2011

Granted

9 Oct 2012

Term ends

Not estimatedThe source records don’t support an estimate.

Classification10 codes

G06F 9/3851
Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution: from multiple instruction streams, e.g. multistreaming
G06F 9/3877
Concurrent instruction execution, e.g. pipeline or look ahead: using a secondary processor, e.g. coprocessor
G06F 9/5088
Techniques for rebalancing the load in a distributed system: involving task migration
G06F 11/3409
Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of…:…

SMT/ECO mode based on cache miss rate

Life of this patent

SMT/ECO mode based on cache miss rate

Life of this patent

Abstract

Claims14