Reducing access contention in flash-based memory systems

A computer program product for reducing access contention in a memory chip, the computer program product including instructions for causing a computer to implement a method, the method comprising:

• selecting a chip stripe in a free state, from a memory device having a plurality of channels and a plurality of memory blocks, wherein the chip stripe includes a plurality of pages;
• setting the chip stripe to a write state;
• setting a write queue head in each of the plurality of channels;
• for each of the plurality of channels in the chip stripe,
• setting a write queue head to a first free page in a chip belonging to the channel from the chip stripe;
• allocating write requests according to a write allocation scheduler among the channels;
• generating a page write;
• in response to the page write, incrementing the write queue head;
• and
• setting the chip stripe into an on-line state when it is full.

A memory system, comprising:

• a plurality of channels having a write allocation scheduler;
• and
• at least one chip stripe communicatively coupled to each of the plurality of channels, the at least one chip stripe has a free state, a write state, an online state and an erase state,
• wherein the at least one chip stripe is configured to be set from the free state to the write state to allocate write requests, and is further configured to be set from the write state to the on-line state when the chip stripe is full.