Memories for electronic systems

An apparatus, comprising:

• a plurality of ports configured to exchange data, wherein the data has a selected word-width that is programmable and dynamically variable;
• a memory including a plurality of banks, each bank having an array of random access memory cells arranged as a plurality of rows that are variably configurable to have a plurality of independently-addressable column groups, wherein each of the plurality of independently-addressable column groups has a predetermined word-width that differs from the selected word-width, and wherein the memory further comprises circuitry configured to select one of the plurality of rows and one of the variably-configured plurality of independently-addressable column groups in response to a received address;
• a buffer associated with one of the plurality of ports and configured to assemble the data with the selected word-width, as received by the one of the plurality of ports, wherein the buffer is further configured to cooperate with the circuitry of the memory to bridge the selected word-width of the data and the predetermined word-width of a variably-configured independently-addressable column group;
• one or more available address tables including a queue of addresses of the memory available to write data to the banks;
• and
• one or more used address tables including a queue of addresses of the memory from which to read data, having the programmable and dynamically variable word-width are stored, from the banks.

A digital information system, comprising:

• first and second resources configured to exchange data in a selected one of a plurality of digital formats, wherein the data of the selected digital format has a data size equal to a word-width, and wherein the data has dynamically variable word-widths;
• and
• a digital apparatus including:
• first and second ports configured to selectively couple the first and second resources;
• and
• a shared memory configured to enable the exchange of the data between the first and second ports, wherein the shared memory includes addresses where the data having the dynamically variable word-widths are stored, and wherein the shared memory comprises:
• an array of random access memory cells arranged as a plurality of rows, wherein a row is variably configurable into a plurality of independently-addressable column groups such that each of the independently-addressable column groups has a width equal to a predetermined word-width that differs from the word-width;
• and
• circuitry configured to write a selected data word from the first port to a selected independently-addressable column group of a selected row during a first time period, to read the selected data word from the selected independently-addressable column group of the selected row during a second time period, and to output the read data at the second port, wherein the circuitry is further configured to bridge the word-width of the data and the predetermined word-width of the variably-configured independently-addressable column group to enable the data to be stored into the rows of the array with the variably-configured plurality of independently-addressable column groups.

A method, comprising:

• configuring one or more rows of a random access memory array into a selected one of a variable plurality of independently-addressable column groups;
• writing data from a first one of a plurality of ports into selected memory cells of a selected independently-addressable column group of a selected row of a random access memory array during a first time period;
• reading the data from the selected memory cells of the selected independently-addressable column group of the selected row of the random access memory during a second time period;
• and
• outputting the read data at a second one of the plurality of ports;
• wherein said writing includes bridging a selected word-width of the data and a predetermined word-width of an independently-addressable column group of a row of the memory array, and
• wherein the selected word-width is a dynamically variable and programmable word-width.