Enhancing timeliness of cache prefetching

A method for enhancing timeliness of cache memory prefetching in a processing system, the method comprising:

• adjusting a confidence counter based on a stride pattern detector detecting a stride pattern for the stride size in an amount of bytes;
• comparing the confidence counter to a confidence threshold;
• requesting, using a separate eager prefetching control logic hardware, a cache prefetch of a cache line x and a cache line x+1 based on the confidence counter reaching the confidence threshold;
• performing the cache prefetch of the cache line x using standard stride prefetching control logic hardware, based on each of 1) the confidence counter reaching the confidence threshold, and 2) determining that a ratio of stride length to cache line size is less than a predefined stride ratio threshold and a demand access location is not within a predefined length from a transition to another cache line;
• and
• performing the cache prefetch of the cache line x and a cache line x+1 using the separate eager prefetching control logic hardware, based on each of 3) the confidence counter reaching the confidence threshold, and 4) determining that a ratio of stride length to cache line size meets or exceeds a predefined stride ratio threshold.

A computer program product for enhancing timeliness of cache memory prefetching in a processing system, the computer program product comprising:

• a computer-readable storage medium for storing instructions for executing a method comprising:
• adjusting a confidence counter based on a stride pattern detector detecting a stride pattern for the stride size in an amount of bytes;
• comparing the confidence counter to a confidence threshold;
• requesting, using a separate eager prefetching control logic hardware, a cache prefetch a cache line x and a cache line x+1 based on the confidence counter reaching the confidence threshold;
• performing the cache prefetch of the cache line x using standard stride prefetching logic hardware, based on each of 1) the confidence counter reaching the confidence threshold, and 2) determining that a ratio of stride length to cache line size is less than a predefined stride ratio threshold and a demand access location is not within a predefined length from a transition to another cache line;
• and
• performing the cache prefetch of the cache line x and a cache line x+1 using the separate eager prefetching control logic hardware based on each of 3) the confidence counter reaching the confidence threshold, and 4) determining that a ratio of stride length to cache line size meets or exceeds a stride ratio threshold.