US 8,285,940 B2 · Method and apparatus for high speed cache flushing in a non-volatile memory

Abstract

An invention is provided for performing flush cache in a non-volatile memory. The invention includes maintaining a plurality of free memory blocks within a non-volatile memory. When a flush cache command is issued, a flush cache map is examined to obtain a memory address of a memory block in the plurality of free memory blocks within the non-volatile memory. The flush cache map includes a plurality of entries, each entry indicating a memory block of the plurality of free memory blocks. Then, a cache block is written to a memory block at the obtained memory address within the non-volatile memory. In this manner, when a flush cache command is received, the flush cache map allows cache blocks to be written to free memory blocks in the non-volatile memory without requiring a non-volatile memory search for free blocks or requiring erasing of memory blocks storing old data.

Claims14

Dependent claims

A method for performing a cache flush in a non-volatile memory, comprising the operations of:

maintaining a plurality of free memory blocks within a non-volatile memory until a flush cache command is received;
examining a flush cache map in response to the flush cache command to obtain a memory address of a memory block of the plurality of free memory blocks within the non-volatile memory, wherein the flush cache map includes a plurality of entries, each entry indicating a memory block of the plurality of free memory blocks;
writing a cache block to a memory block at the obtained memory address within the non-volatile memory, wherein the plurality of free memory blocks comprises a predetermined number of free memory blocks, and wherein the predetermined number is based on a predetermined number of cache blocks.

Dependencies are inferred from the claim text.

Method and apparatus for high speed cache flushing in a non-volatile memory

Life of this patent

Method and apparatus for high speed cache flushing in a non-volatile memory

Life of this patent

Abstract

Claims14